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  1. #1
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    Help me with this circuit

    Can you pls. describe what is happening in this circuit with SW1 open? What happens if SW1 is closed? Vout at initial To =0V.


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    Help me with this circuit

    as given initially vout=0 charge on C1 is also zero !! ..

    case 1
    when sw1 is open terminal 2 is high so output of nor wil be low

    case2
    when sw1 is closed for some time both terminal 2 and terminal 3 will be at zero voltage n output will be high !!... now charge is developed n when sufficient charge is develop again output will fall to zero



  3. #3
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    Re: Help me with this circuit

    i agree with shiv_emf but i would like to add a point... in case 2 when the input voltage of terminal 3 starts increasing and at a point the output drops to zero and so the capacitor starts discharging through the resistor and hence the output would again become high quickly and this time period depends on the R and C values....



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  4. #4
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    Help me with this circuit

    yes i agree with anand !! ..

    so if v keep sw1 on for long time.. do v get sinusoidal waveform or square ?



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  5. #5
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    Re: Help me with this circuit

    it would be a square wave(slewed) if the gate is fast enough else it would be a triangle wave whichs peak voltage would depend on R*C.....


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    Help me with this circuit

    thanks... anand !

    but i am unable to analyze triangle waveform !! cud u plz explain :)

    Shiv



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  7. #7
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    Re: Help me with this circuit

    suppose the RC constant is very small then the input at terminal3 might switch before the output switches and this would make the output to switch before it reaches the maximum value and this would lead to a triangle wave......
    it would be a triangle since the output cannot switch perfectly i.e.perfect vertical transition...



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    Help me with this circuit

    i dont know influence of second NOR input over the first one , but if it is not interfering , for cmos logic , output voltage should half of power supply and logic ic should work in linear mode if button pressed for time more than multiple of R*C value .



  9. #9
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    Re: Help me with this circuit

    Quote Originally Posted by A.Anand Srinivasan
    i agree with shiv_emf but i would like to add a point... in case 2 when the input voltage of terminal 3 starts increasing and at a point the output drops to zero and so the capacitor starts discharging through the resistor and hence the output would again become high quickly and this time period depends on the R and C values....
    Is it polarity of the c1 is correct?



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  10. #10
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    Re: Help me with this circuit

    This circuit might not work for a TTL gate ... as one of the NOR gate inputs is connected to the ground through the capacitor... In TTL logic logic zero is only when the input is connected to the ground and not when the input is floating... so one of the inputs of the logic gate connected through the capacitor will be in logic 1 making the output to remain zero always...



  11. #11
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    Re: Help me with this circuit

    artem said:
    i dont know influence of second NOR input over the first one , but if it is not interfering , for cmos logic , output voltage should half of power supply and logic ic should work in linear mode if button pressed for time more than multiple of R*C value .
    that would be true only when the input and output would be equal at a particular voltage and that level of matching is rare....

    fazan said:
    Is it polarity of the c1 is correct?
    polarity of C1 is wrong....

    that notation is actually to indicate that the structure of the electrode inside a capacitor is changed for the sake of increasing the capacitance.....
    but when used in the reverse direction only a small decrease in the capacitance and voltage rating results....



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    Re: Help me with this circuit

    This is a gated oscillator. With the switch open, it is stopped. Once the switch is closed, the output goes high, charging the capacitor. Once the logic one level is reached at the capacitor, the output goes low and the capacitor discharges through the resistor to the output. For reliable operation, schmit trigger inputs are preferred. The period of oscillation starts after an initial delay produces a square wave output. The gate is not biased into linear operation.

    Swingbyte



  13. #13
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    Help me with this circuit

    this circuit will oscillate if there is positive feedback , but it is negative



  14. #14
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    Re: Help me with this circuit

    how do you say the feedback is negative.... check out the sign of the output and the sign of the change in voltage across capacitor i.e feedback.... the output aids the input.... so it is positive feedback only.....



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