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  1. S

    problem on freq drift of LO in bluetooth system

    Hi, ge,thank you for your answer, the temperature coefficient is a problem. In the schematic simulation, I've found that a temperature drift of only 0.015 degree may lead to a frequency drift of 15KHz. But, the transceiver is working in full-duplex way in TDD mode. That is, whether it is in...
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    problem on freq drift of LO in bluetooth system

    Hi, RFCMOS, thank you for your answer, but I haven't understand it well. 1 time slot equalls only 625us, so, and would the possible temperature drfit be so evident to change the frequency drift? And how could I verify that it is caused by the temperature? Would you please give some examples or...
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    problem on freq drift of LO in bluetooth system

    Hi, friends, I met a strange problem!!! In bluetooth sytstem, the tolerance of freq drift of fc for a packet with 1/3/5 time slot is 25KHz/40KHz/40KHz. And the test result verifies that the longer packet with 3/5 time slots would have higer freq drfiter than the one with only 1 time slot...
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    corner sim in ADE---pcf file and library problems!!! urgent!

    corner simulation ade Hi, dear all, the above problem has be settled by myself. In the corner analyse, there shouldn't be "." or "-"in the corner name, otherwise, there would be strange interruption like "remote calling". Please pay attention to it.
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    corner sim in ADE---pcf file and library problems!!! urgent!

    pcf file Dear all, I am trying to do some corner simulation in the ADE of candence, using the tool->corner... I use the tsmc018 process. I wrote a model file as cor_p3_libs.scs (following): library cor_p3_libs section tt_1.8_27 include "../rf018.scs" section=tt include "../rf018.scs"...
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    why the poles of polyphase filter are logarithmicaly spaced

    Dear all, why the pole frequencies are logarithmically spaced? It is said to get equiripple response. But I wanne know more details. Could anyone enlight me on this topic or up load some reference? I know a paper R.C. V. Macario and I.D. Mejallie, "The phasing method for sideband swlection in...
  7. S

    as for rc calibration

    I am searching for some reference materials on this topic. Are there anyone familiar with it? Yes, I know, it is used to compensate the unaccuracy introduced in in process. But, no detailed information on it has been found. Thank you in advance.
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    anyone know bandwidth function in cadence? it seemed wrong!

    Re: anyone know bandwidth function in cadence? it seemed wro Hi, dear all, the following is the answer I got from an AE in cadence, hope it would be helpful. For your first question, you can ignore 20dB for your output because 20dB is included in bandwidth function. For example, if you want...
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    anyone know bandwidth function in cadence? it seemed wrong!

    Re: anyone know bandwidth function in cadence? it seemed wro Thank you for your kindness, but maybe I didn't clearify it. I use the new versions of calculator ---wavescane here. And the bandwidth function is directly listed in it. I use 20dB(Vf (outp)-Vf(outn)) to get the gain. And then, I use...
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    anyone know bandwidth function in cadence? it seemed wrong!

    Hi, dear all. Are there anyone familiar with the wavescan calculator of cadence? It seemed to be totally wrong. I use it to measure the 3dB bandwidth, whether it is low, high or band, the results go far from the right values. Are there any settings that I should be careful of? Or is it just a...
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    help needed on the standard of the supply voltage of IC

    So, what about the 0.5um? Then, if it is a 0.18um process, whether it comes from TSMC or UMC or other factories, the supply voltage would be 3.3V, right? Do you mean that it is a sticked standard? So, what is this standard? Would you please give me some more suggestion?
  12. S

    help needed on the standard of the supply voltage of IC

    0.18um supply voltage Dear all, I am now confused by the supply voltage of IC. It seems to be related to the process. For example, the TSMC 0.18um tends to use both 3.3V and 1.8V, and 0.25um process tends to use 2.5V, while 0.6um or so use 5V. But, why it is 5V rather than 4.5V, why it is 3.3V...
  13. S

    offset cancellation loop of limiting amplifier

    Hi, friends, a low pass filter is usually used to cancel the DC and low frequency offset caused by mismatch in limiting amplifer. However, I have difficulty in deducting the theorectical function. Could anyone of you help me on it? Or, are there any materails on this topic? Thank you all...
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    help on the theoretical backgroud of RSSI

    Thank you very much. I have this materail. But, what I am wondering is, the theoretical explanation of RSSI. Why piece-wise approximation can approximate Logrithmic funcion? And the other method? What is the function behind them? Like the taylor function ln(1+x)=1+X+....? Could any one...
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    help on the theoretical backgroud of RSSI

    Hi, friends. I am doubting on the theoretical background of RSSI. There is majorly 2 may to get the logrithmic function for RSSI. First is the piece-wise approximation, used in cascaded amplifiers. Second, which I am not so sure yet, is dependent on the direct power detector which is composed of...
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    apply CMOS to get PECL interface?

    Hi, friends. I am trying to apply the 0.6um or 0.5um CMOS process to design a PECL interface used as output buffer of main amplifier on 155Mbps and 622Mbps.(the supply would be 5V) This field is quite new to me. Could any one of you please enlight me on these question? 1 How about the...
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    can active inductor be used with source follower?

    Hi, dear all. I am desiging a cascaded CMOS amplifier with broadband and high gain. One soluion to get broad bandwidth is the use of active inducto formed by NMOS and Resistor. My qustion is , in the papers I read, I found that where the activce inductor is used, no soure follower is followed...
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    quesion on active inductor and source follower

    Hi, dear all. I am desiging a cascaded CMOS amplifier with broadband and high gain. One soluion to get broad bandwidth is the use of active inducto formed by NMOS and Resistor. My qustion is , in the papers I read, I found that where the activce inductor is used, no soure follower is followed...
  19. S

    comparator with hysteresis

    Hi, sarabjeet. I've simulated and study the structure in P.Allen's book. As for your question. the width of the hysteresis window is determined by mainly 3 factors. (1) the W/L of the input transistor pairs (2) the value of the tail current (3)the positive feedback factor, in Allen's book it...
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    LA or AGC? it is a puzzling quesiton.

    Hi, friend. I know that LA(limiting amplifier) and AGC( automatic gain control) are 2 candidate for the post amplifier/or Main amplifier in optical tranceiver. And I already know some of their advantages and shortcomings. I have 2 quesions: (1) Since LA is more fast in transient response(no...

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