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    [SOLVED] DC offset remova and phase issues

    DC offset removal and phase issues The current filter I use is from the Xilinx app note on dc offset removal. However, it adds a noticeable phase shift to my signal of 9 degrees at the highest frequency, and around 40 degrees at the lowest. I am comparing this signal with a square wave and the...
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    Displaying code in multiple languages

    I've never had to do this before and I'm having troubles finding some good references on this topic. What I have is an embedded system with a GUI that is displayed in English. What I want to do is allow for the user to go into settings and pick their language of choice from a list and then have...
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    Multiple input PID loops

    Multiple SISO PID loops I have a system that I'm trying to control using feedback that receives voltage(rms), current(rms), phase, and line input power. Currently, I put all these signals into separate PID loops and then take the smallest value of the outputs. This works fine in the steady...
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    Phase error calculation of current transformer

    Hey, I am trying to understand how to model the phase error of the current transformer I'm using in my project. It is a triad cst206-3A with a 1:300 turn ratio, ET of 6000 v/uSec, min inductance of 130 mH, a max DCR of 12.4 ohms, and primary amps of 70 RMS. There is also a burden resistor of 22...
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    Problem with input signals in ADC quantization

    I'm using the eval kit TI ADS62P22, 12 bit 65 MSPS. I'm running it off the internal reference common mode which is listed as 1.5 V and a REFT as 2 and a REFB as 1. The problem I have is I don't understand the numbers I get from the input signal. They look like the input signals in shape and...
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    Signal integrity for ADC (LC filter question)

    I have an ADC that samples 12-bits at 65 MHz that I'm feeding into an FPGA. At the moment, I'm just trying to evaluate the ADC. It has a typical SNR of 71.6 dBFs, a SINAD of 71.5 dBFs, THD of 93dbc. When I put a low frequency sinusoidal signal from a HP 33120A signal generator at around 100kHz I...
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    Problem with VHDL code for subtraction

    I cannot get the following code to produce the correct results of a subtraction and I'm not sure what is wrong with it. Current is an input from an ADC that is in two's complement form. The clk is the same for both the ADC so that I should be clocking in a new sample at the same rate of the ADC...
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    Loading programs into FPGA ram/flash

    I'm currently using the evaluation version of the Cortex-M1 and my program size has exceeded the 64kB allowed for the evaluation version. Therefore, I want to load my FPGA config file with a bootloader that executes instructions starting at external SRAM or Flash. Unfortunately, I'm very new to...
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    Vertical pixel scrolling LCD

    Hi, I'm currently using a 4x20 text LCD as a menu display. I have been able to get the menu to scroll vertically, but it scrolls by individual lines. Would a graphics LCD be the way to go to achieve pixel scrolling, or are there some text LCD's that allow this ability?
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    High performance frequency counter

    Basically I will be reading in signals from 100kHz to 500kHz, or 10 us to 2 us. I want to calculate the frequency to as best precision as possible within a Cyclone III board, atleast 2.5 ns. What is the best way to do this or is it even possible? Added after 2 hours 3 minutes: Basically I'm...
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    Cordic algorithm troubles

    So I'm doing some digital signal processing. I have a a current and a voltage signal that I am multiplying together and then filtering through a lowpass filter to get a signal that equals A*B*cos(phi)/2. At this point I want to find phi, so I need the inverse cosine function. Unfortunatly I'm...

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