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  1. S

    problem on freq drift of LO in bluetooth system

    Hi, friends, I met a strange problem!!! In bluetooth sytstem, the tolerance of freq drift of fc for a packet with 1/3/5 time slot is 25KHz/40KHz/40KHz. And the test result verifies that the longer packet with 3/5 time slots would have higer freq drfiter than the one with only 1 time slot...
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    corner sim in ADE---pcf file and library problems!!! urgent!

    pcf file Dear all, I am trying to do some corner simulation in the ADE of candence, using the tool->corner... I use the tsmc018 process. I wrote a model file as cor_p3_libs.scs (following): library cor_p3_libs section tt_1.8_27 include "../rf018.scs" section=tt include "../rf018.scs"...
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    why the poles of polyphase filter are logarithmicaly spaced

    Dear all, why the pole frequencies are logarithmically spaced? It is said to get equiripple response. But I wanne know more details. Could anyone enlight me on this topic or up load some reference? I know a paper R.C. V. Macario and I.D. Mejallie, "The phasing method for sideband swlection in...
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    as for rc calibration

    I am searching for some reference materials on this topic. Are there anyone familiar with it? Yes, I know, it is used to compensate the unaccuracy introduced in in process. But, no detailed information on it has been found. Thank you in advance.
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    anyone know bandwidth function in cadence? it seemed wrong!

    Hi, dear all. Are there anyone familiar with the wavescan calculator of cadence? It seemed to be totally wrong. I use it to measure the 3dB bandwidth, whether it is low, high or band, the results go far from the right values. Are there any settings that I should be careful of? Or is it just a...
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    help needed on the standard of the supply voltage of IC

    0.18um supply voltage Dear all, I am now confused by the supply voltage of IC. It seems to be related to the process. For example, the TSMC 0.18um tends to use both 3.3V and 1.8V, and 0.25um process tends to use 2.5V, while 0.6um or so use 5V. But, why it is 5V rather than 4.5V, why it is 3.3V...
  7. S

    offset cancellation loop of limiting amplifier

    Hi, friends, a low pass filter is usually used to cancel the DC and low frequency offset caused by mismatch in limiting amplifer. However, I have difficulty in deducting the theorectical function. Could anyone of you help me on it? Or, are there any materails on this topic? Thank you all...
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    help on the theoretical backgroud of RSSI

    Hi, friends. I am doubting on the theoretical background of RSSI. There is majorly 2 may to get the logrithmic function for RSSI. First is the piece-wise approximation, used in cascaded amplifiers. Second, which I am not so sure yet, is dependent on the direct power detector which is composed of...
  9. S

    apply CMOS to get PECL interface?

    Hi, friends. I am trying to apply the 0.6um or 0.5um CMOS process to design a PECL interface used as output buffer of main amplifier on 155Mbps and 622Mbps.(the supply would be 5V) This field is quite new to me. Could any one of you please enlight me on these question? 1 How about the...
  10. S

    can active inductor be used with source follower?

    Hi, dear all. I am desiging a cascaded CMOS amplifier with broadband and high gain. One soluion to get broad bandwidth is the use of active inducto formed by NMOS and Resistor. My qustion is , in the papers I read, I found that where the activce inductor is used, no soure follower is followed...
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    quesion on active inductor and source follower

    Hi, dear all. I am desiging a cascaded CMOS amplifier with broadband and high gain. One soluion to get broad bandwidth is the use of active inducto formed by NMOS and Resistor. My qustion is , in the papers I read, I found that where the activce inductor is used, no soure follower is followed...
  12. S

    LA or AGC? it is a puzzling quesiton.

    Hi, friend. I know that LA(limiting amplifier) and AGC( automatic gain control) are 2 candidate for the post amplifier/or Main amplifier in optical tranceiver. And I already know some of their advantages and shortcomings. I have 2 quesions: (1) Since LA is more fast in transient response(no...
  13. S

    choice between LA and AGC

    Hi, friend. I know that LA(limiting amplifier) and AGC( automatic gain control) are 2 candidate for the post amplifier/or Main amplifier in optical tranceiver. And I already know some of their advantages and shortcomings. I have 2 quesions: (1) Since LA is more fast in transient response(no...
  14. S

    the bandwidth of LA(limiting amplifier)

    Hi, friends, I have some doubts in the decision of the bandwidth of the LA (limiting amplifier). I've been told that 0.8 times of data speed is enough, a higher bandwidth will introduce more nosie. However, I also read in some books and paper that 1.0 to 1.2 times of data speed is the...
  15. S

    the definition of sub-threshold area

    Hi, friends. I know that when Vgs get very close to Vth, the operation area is called sub-threshold area. But, is there a clear definition, a water shed on it? I mean, judge by the value of Vth and Vgs. In the *.lis file produced by hspice, the states are only divided into saturati, cutoff and...
  16. S

    negative CMOS capaticance

    cmos negative capacitance Dear all, I am trying to get 2 negative capacitances used in differential pairs to enlarge its bandwidth. I use the gate of a NMOS transistor as the "positive" end and, connect the drain and source of it as the "negative" end. I found 2 strange things.:cry...
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    doubt on simulating the startup circuit

    Hi, friends, I doubt some questions on simulating the startup circuits. First, why should we use both DC and transisent simulation to test it? Second, why shoudl we simulate with different slope of VDD ramp up in transisent analysis? Third, is it a real case in circuits or just a poential...
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    Bandwidth differential amplifier?

    Hi, friends. I am trying to optimize a differential amplifier on the bandwidth with its Gain not changing much. The topology is typical, with resistor connected between Vdd and the drain of input MOS transistor as the load. And I found, usually, when I decrease the the W/L of input transistor...
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    anyone know startup circuit, please come in

    Hi, friends, Is it an already-tested phenomenon that the circuits like self-referenced current sources, bandgap reference circuits will stay in “zero state” if they don’t have a so called “startup” circuit? Or the startup problem is just a potential danger we get by theoretical analysis? The...
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    show low_freq cutoff in hspice, help please!!!!

    Hi, friends, I am designing a cascoded amplifier. And I wish to evaluate its bandwidth and gain of every stage(differential). I use commands as follows: .probe AC VOUTDB=PAR('DB(V(out1)+V(out2))-DB(V(in1)+V(in2))') And then, I read the gain showen in avanwaves and the 3db bandwidth by...

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