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it looks probably like ur ethernet drivers are not installed properly..........
Make sure that ur network drivers are installed .. Once its installed, goto the network option in Administration and u can set the IP ..then u can connect to the internet
I have the usb cable to download the bitstream to the fpga. I have used the serial connector of my board to connect to the pc.
I don't have a jtag cable to connect my fpga(spartan) to the pc.But i found some softwares which emulate the behavior of jtag.I don't know how to use it also.
Re: function used in RTL
Register transfer level abstraction is used in hardware description languages (HDLs) like Verilog and VHDL to create high-level representations of a circuit. In VHDL functions can be used, as there is concept of subprograms which comprises of procedures and functions ...
Re: Basic Question
Follow these steps
create a file called YourFile in /usr/local/bin ie( /usr/local/bin/YourFile)
copy your settings file to a YourFile
export your Display properties to Yourfile
export "exec ise" to YourFile
Change the permissions of YourFile
now you can invoke the tool by...
I am able to synthesize my design in ISE9.2i. When i try to implement,it is throwing an error
error:The design is too large to fit the device. (In packing phase)
how should i make my design to fit into the device
i would like to know whether a architecture developed by a later version of ise can be ported to an older series of ise
for ex. whether a architecture developed using 8.2i can be ported to xc4003e / spartan xcs10
pls tell me its very urgent..............
But when I use SoC Encounter to read this netlist file it doesn't appear the die size as general
i am unable to understand what "die size in general means" ..
can you explain exactly what error its showing...
ncsim cannot elaborate
The elaboration process actually constructs a design hierarchy according the information you gave in the design such as the instantiation,configuration ,etc to give the signal connectivity and computes some initial values for all the objects in the design ,which is stored...
what is inertial delay
In inertial delay ,the spikes are not propagated to the output whereas in transport delay the spikes are propagated to the output. Usually inertial delays are used for component delays , while transport delay for interconnect delays