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I've been trying to do something similar.
What I've learnt are these:
- u-boot and uImage kernel should match (both were compiled for the same target, e.g. beagleboard, or devkit8000, has something to do with board id I think).
- both devkit8000 uImage kernel and beagleboard uImage kernel can...
we use some comparatively cheap Mini2440 a.k.a FriendlyARM boards from http://www.friendlyarm.net. Has Linux OS installed, USB host, general purpose IO, 4 ADC channels, I2C, 3 serial ports, optional CMOS camera, 10x10cm dimension, with an LCD touch screen. But the full complete documentations...
Yes, and for the first two bits you might need to shift it some bits. I havent program in C for years, but i think there are bit manipulation operators, shouldn't there? Pls have a look at this site for an example: **broken link removed**
I'm not into embedded systems lately. What i know is a friend did his PhD recently in JPEG2000 compression hardware implementation. A friend doing master by research in robotics is looking at SLAM (simultaneous localisation and mapping) techniques for autonomous robots. Another friend at CSE is...
inverter ramp input
hi, i wonder if anyone can help me with this "inverter delay measurement" problem i have.
Normally, textbooks define inverter propagation delay to be = RCln(2), which is the time interval between 50% change in input to 50% output change (CMIIW). Apparently, this formula is...
Re: Microcontroller in C
From my own experience, i find that programming microcontrollers in C would be easier if we understand the architecture of the MCU, including its registers, its instruction sets, its interrupts, etc. Hence, learning a bit of assembly first won't hurt ;-)
Re: minimize power
One way is to lower the supply voltage, it gives quadratic power savings, ideally.
Sizing transistors also matters, for example of an inverter, it's suggested that the output transition slope is much longer than the input rise/fall time, to reduce static current...
Re: SRAM questions
That's very interesting.
As far as i know, i'm not an SRAM expert, what affects the area of a RAM is the size of the memory itself. For the same technology, the dual port SRAM might have a memory capacity almost 3 times the single port one. But this also depends on what...
I am trying to study the effectiveness of several low power on-chip interconnect techniques. In addition to measuring the propagation delay and its maximum speed achievable, i would also need to test them with input data patterns representing realistic conditions that might be found on real...
Taking your friend to the train? haha, i like it.. :-)
What about this one:
you will need a certain amount of time to take a deep breath and then lift the weight (setup time). after that, you still need to hold the weight on top of you for a few seconds (hold time), then you...
you cannot program the chip with ISP anymore, hence you should use the other way: parallel high voltage programming (is this the correct term?)
refer to the datasheet for details. otherwise, just buy another chip ;)
- implementing an 8-bit microcontroller on an FPGA
- video processing for surveillance
- vehicle tracking system using GPS
- tsunami early warning system
- portable and inexpensive data logger
all the best.
Re: TSMC 90nm
i am using the cadence generic process design kit, and i think it's adequate for layout and simulations. they have the 90nm PDK as well as the 180nm one.
As for TSMC, i am not too sure how you can request them.
i can't quite understand your analogy.
first, flowing water has no two different states as streaming bits.
secondly, well i think that's it :D
setup time and hold time is a time period where the change of logical states becomes the boundaries of them. please CMIIW
Re: digital v/s analog
one more thing that i might add.
in designing analog circuits, noise will be a bigger concern to deal with. and there are much more factors that need to be taken into consideration: bandwidth, matching, and of course power.
Hence, in analog design, one would not merely...
Re: different threshold
yes, they do have different threshold voltages. nmos transistors have positive threshold voltage, whereas pmos have negative ones. their absolute values are different as well. you would normally have to refer to the datasheet for a certain technology, which differs from...
as far as i know, low-vt devices work faster but they consume more power due to subthreshold current leakage. high-vt transistors reduces this leakage significantly but its delay time will be longer than low-vt devices.
that is why low-vt device are used in critical path (needs to be fast)...
plot current cadence
my problem is that i cannot plot transistor node currents. current flowing through voltage source nodes are no problem, they are fine.
apparently i still have to do it the old annoying way: add a dc voltage source for current measurement.