# Search results

1. ### About single loop multibit delta-sigma modulators

Re: multi bit quantizer in matlab If you want to get 20.625 divider value, and the DSM is MASH 1-1-1. Then your divider must divide from 16~23. The divider must be a mutimodulus divider. It can be made by a dual-modulus prescaler+P/S Counter or other medthods.
2. ### Design a fourth-order sigma-delta modulator

you should do more behavorial level of work
3. ### Help me with designing multiplexer using SCL

SCL SCL is sourec coupled logic , which is also called CML (current mode logic). You can serch cml in edaboard.
4. ### Building an adder with transistors in analog library

About building an adder If I build a 20-bit adder with transisters in analog library (because I don't have digital library), is it much different from the adder building with digital standard cell? And what should I pay attention to build it? When it is finished, how can I simulate to make sure...
5. ### sigma delta modulator: Verilog code to MATLAB?

sigma delta modulator I think eejli talking about a digital delta-sigma modulator. It may be used in a fractinal-N frequency synthesizer or a DA converter.

y(tr+1:tt) is the transient results. Y is the FFT results of y. Py is actually (abs(Y/(L/2)))^2. 10*log10 turn the unit to the dB
7. ### sigma delta modulator: Verilog code to MATLAB?

sigma delta modulator site:edaboard.com See sth about FFT. Just do a FFT to the transient results, you will get the spectrum. Added after 1 minutes: See sth about FFT and window function. Just do a FFT to the transient results, you will get the spectrum.
8. ### Building an adder with transistors in analog library

About building an adder If I build a 20-bit adder with transisters in analog library (because I don't have digital library), is it much different from the adder building with digital standard cell? And what should I pay attention to build it? When it is finished, how can I simulate it easily...
9. ### What is the practical application of PLL?

PLL application You can use frequency synthesizer(PLL with divider) to get any frequency you want. But crystal oscillator can't do this.
10. ### Questio about Vo of two capacitors in series

Two capacitor in series So, you mean, when S2 closed, there is no charge flow from 10V?
11. ### How to determine the Kvco value of a VCO?

first, draw the curve frequency vs vin than use calculator to calculate the slope
12. ### Help about simulation of prescaler!

Thanks! Are there any other methods? I remember some paper mentioned cascading 3 D-flipflops to form a ring oscillator, I want to know more about this or methods like this.
13. ### Help about simulation of prescaler!

How to simualte the maximum working frequency of a prescaler and its power consumption? Thanks!
14. ### Looking for a PLL AC model

About PLL AC model... you can simulate the transfer function in matlab or mathcad,etc...
15. ### Fref of delta-sigma modulator in PLL

Thanks! I know the PLL Fref is the frequency it works.(The real working frequecny should be the divided vco frequency,right?) I want to know if my Fref is about 20MHz, does it need special adder? Or normal adder can reach it? And how about 4th-order MASH?
16. ### Fref of delta-sigma modulator in PLL

A 3-order MASH modulator in fractional-N pll, each stage uses a 20-bit accumulator. How fast can it work? And generally what frequency does it work at? Thanks!
17. ### hlp! Prescaler in fractional frequency synthesizer

Can anyone help me? And another question. How to design the dividers(P_counter and S_counter) after prescaler? I means use verilog codes or design it by myself? And the counters are synchronous or asychronous?
18. ### About wc of fractional-N pll

How to decide ωc of fractional-N pll if the specs such as settling time and Fref are known? Can I use T_set=-lnε/ωc (ε is the accuracy)?
19. ### hlp! Prescaler in fractional frequency synthesizer

The center freq. of VCO is 1.8G, so for fractional pll frequency synthesizer, 8/9 and 16/17 prescaler, which one is better choice? (Fref is 26MHz, when 16/17 prescaler is used ,the Fref is divided by 4).
20. ### About single loop multibit delta-sigma modulators

delta sigma modulator with feedback What do you mean? e.g. a 20bit input, it stands for between 0...1 or 0...7? And when you substract the filtered LSBs, substraction is used, you should use 2's complemenary, and so how to use only positive inputs?