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  1. S

    Trouble with Hyperlynx

    I am using Hyperlynx for SI simulation of a board file which was created using the cadence allegro flow. Hyperlynx provides a translator utility which converts the .brd (allegro board layout) to .hyp (hyperlynx readable board file). But when i try to translate the board file, the translator...
  2. S

    Need career advice..! Please help me!

    Need career advice..! First of all to give a quick background about me: I am a electronics engineer with a B.Tech from one of the top 10 indian engineering colleges. I have been in the hardware/vlsi industry from the last 3 years. During this period i have worked in different types of...
  3. S

    Need career advice, three questions

    First of all to give a quick background about me: I am a electronics engineer with a B.Tech from one of the top 10 indian engineering colleges. I have been in the hardware/vlsi industry from the last 3 years. During this period i have worked in different types of activities including RF designs...
  4. S

    a question about "vpp"

    it means volts-peak-to-peak
  5. S

    Xbox360 or Playstaion3

    neighther
  6. S

    Sonic weapon – a cry for help.

    man your story seems like a plot straight from a sci-fi thriller...
  7. S

    Need Advice for Learning Embedded Systems

    The key to understanding any embedded system is to understand RTOS porting and its architecture.. Mostly while working on actual projects the hardware is assumed to be a black box and development is done on a simulator.. I think the best way to understand is to first try porting for different...
  8. S

    [Need Help] Using IE3D

    Whenever you put the frequency range on the simulator, the Patternview waveform will be evaluated only for the given frequency points.. So if you get a resonant frequency, it is actually the sample which gives highest return loss.. If you want to evaluate the exact resonant frequency, narrow...
  9. S

    GPS tracking sensitivity

    This means that the energy recieved per Hz bandwidth of the recieved signal is 22dB above the per Hz noise energy..
  10. S

    How to make simple board at home?

    you may use perfboards.. cheap and easy to solder.. No need of expensive tooling and harmful chemicals.. all you need is some single core wire and soldering equipment..
  11. S

    what is the next Hot IP ?

    cores for Wimax baseband processing..
  12. S

    startup or BIG Company

    agree with vak..same here..i have been through a startup and a biggie.. in startup --> life has a meaning, u have the bigger picture, u are in control of your career.. bigger company-->die in the wool, fewer opportunities,tunnel vision..
  13. S

    Value change dump file

    value change dump to simulation pattern Hi, I have been using GTKwave for quite some time. Verilog allows me to design modules and primitives with a finite rise/fall time. But while viewing the waveforms in GTKwave, all the edges are vertical. Its a little counterintuitive to work with such...
  14. S

    Regarding PSL Assertion

    RXActive is a signal in the top level module and rxactive is defined in the instantiated module. Thats why rxactive is not visible in the top module and you are getting a error. You may assert RXAactive and monitor it becoz anyway rxactive is tied to RXActive..
  15. S

    wat does 65nm 90nm mean

    lambda based rules are used for fabrication afaik.. where lambda is twice the minimum feature size.. so 65nm is the length of the channel..
  16. S

    Low-power design lessons and reference

    Re: Low-power design good work denmos, but all of the above looks like it has come from this page: :roll: **broken link removed**
  17. S

    footprint compatibility

    It means that the chip pinouts,dimensions and pin sequence will be same in the two devices.. The only difference will be in the onchip die..
  18. S

    Need Info : Courses in embedded systems

    hi all, I am interested in pursuing a career in embedded systems programming.. What are the different courses available if i want to pursue a professional embedded systems course? Which processor and RTOS combination will be widely used in the future? My basic requirements are to program for...
  19. S

    Unhelpful Xilinx Error Message

    quite a powerful configuration u got there.. for the humble pentium loyalists, cranking up the RAM is the only way out.. still a full blown v2p design takes about an hour on the core2duo..
  20. S

    Which FPGA is better to use?

    spartan-III or virtex-2 pro are generally sufficient.. But the best thing to do is to synthesize the modules first and choose the FPGA based on the number of CLB's reported.

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