# Search results

1. ### LVDS signals and ground

The LVDS signals will be transmitted through a 4 positions flat cable.Can I use 2 of these wires for one LVDS pair and the other 2 wires for vdd and gnd?
2. ### LVDS signals and ground

Hi everyone! I have a motherboared which sends 2 pairs of LVDS signals to a daughterboard through ffc cable. My question is, the receiver at daughterboard should it be supplied by vdd and ground coming from the original source of LVDS's signals(e.g. motherboard)? And if so, what is the minimum...
3. ### M-LVDS connectors for multidrop topology

Thank you for your answer. I have a clock signal (M-LVDS signal as well) and i want to distribute it to 10 daughterboards through one twisted pair, what connectors can i use to form a T-connection? And also, could you suggest any appropriate connectors for the connection with the pcb for maximum...
4. ### M-LVDS connectors for multidrop topology

Hi everyone! In my system I wil have one motherboard and ten daughterboards, but they won't be pinned onto the motherboard, the communication between the master(motherboard) and the slaves (daughterboards) will be done through cables. Are there any cables and connectors for multidrop topology...
5. ### FSK symbol error probability

Thanks (again) for your reply!I'm trying to calculate the symbol error probability using repetition codes,not only BER.I've attached the code i've written if you could take a look and see what's wrong...It's not very well written so i have written a readme.txt to explain.
6. ### FSK symbol error probability

Hi!I'm trying to plot in matlab the symbol error probability (fsk modulation through AWGN channel) vs snr (0-30 db) using repetition codes (n,1) for n=1,3,5,7. I must be doing something completely wrong because instead of improving the error probability as I increase n,it only gets worse!Has...
7. ### AWGN bit error probability

Hello,I'm writing a project for a class but i'm having some difficulties in the theoretical part and i would like some help...In a transmition through AWGN channel with FSK modulation given that the bit error probability without encoding is Pa= (1/2) *[e^(-Eb/(2*No))] how can we prove that bit...

9. ### Communication between labview and CyUSB (Cypress)

Hi!I want to use labview in ordrer to control Cypress USB (CY7C68013).Has anyone done anything similar?I'm having problems trying to communicate with CyUSB and i could really use some help.
10. ### Making changes from allegro to capture

Hello,it's the first time i'm designing a pcb and i have some questions.I've almost finished my design in allegro but there were some mistakes in the schematic from capture.For instance,i want to assign a different footprint on a potentiometer i am using and to supply it from a different power...
11. ### How much current XC2C32A CPLD draws?

CPLD power supply Hello,i'm using a cpld (XC2C32A) but i can't find how much current vcc(1.8V), vccaux (3.3V) and vccio(3.3V) draw.I'm thinking of using TPS76918 and TPS76933 as regulators,they can source up to 100mA,is this enough?(here is the link to the datasheet of the cpld if anyone can...
12. ### Help with a circuit.....

Hello,i have this circuit which sources or sinks current and i should control Vin- and Vin+ with a pot with its 2 edges connected to a negative and a possitive power supply respectivelly.First of all i would like someone to explain how this circuit works because i don't really understand and...