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  1. E

    choosing 1.8 or 3.3V MOS transistor for analog IC design

    Hi I have to design an analog circuit for IC whose power supply is not freezed. How do I select which transistor to use from PDK library provided by the foundry? Which parameters like VDD, Gm , Gds , Ft, Ron etc. takes priority in deciding transistor choice as per my application. I am...
  2. E

    IC package ground plane

    Ic package ground plane Inside an IC package, what is the purpose of ground plane. Is it connected to the backplane of substrate for biasing it. Is it useful only in high frequency RF circuits or required for low frequency analog and digital circuits also.
  3. E

    Output matching for cascode LNA

    I am designing a single stage source degenerated cascode LNA. I have understood most of it theory regarding input matching but dont understand how to do output matching of thi LNA ? Hope someone can explain it to me. Regards Vipul
  4. E

    Create opamp macromodel from hspice/spectre netlist

    Hi Dick and Pancho Thanks for ur replies. 1. Is the encryption foolproof. Can u please send me some links on how to implement this encryption. 2. As for macromodel is it possible that i may use already existing macromodel in market from IC supplier and put my measured spec Numbers in it. Or...
  5. E

    Create opamp macromodel from hspice/spectre netlist

    Hi I am an analog ic designer and want a way to share my design IP netlist to some external customer without sharing actual netlist. I believe it can be done by using macromodel. But how to create one for say opamp block. Or is their any better method. Regards Vipul
  6. E

    How to use ".LIN analysis" in HSPICE

    And what about the output port ??? In case of measuring output impedance of opamp , what value should I us of impedance in output port ??
  7. E

    Biasing analog circuit : Beta multiplier or Resistor bias

    Is it a good idea to use on chip resistor to provide biasing currents to the current mirrors in analog circuit ? Or should self biasing "beta multiplier" ckt be used to generate this biasing current always ???? Also what are the disadvantages of using the biasing resistor external to the...
  8. E

    How to use ".LIN analysis" in HSPICE

    But what should be that impedance value I need to put in port element. For example if I want to measure the output impedance of an Opamp then is it OK to work with impedance value of 50Ohm . What does this impedance / resistance value required by the port element signifies ????
  9. E

    Commercially available CFA IC in CMOS technology ????

    Well I need to design a CFA but do not have BJT or BiCMOS technology available with me to design a BJT based CFA. Hence was exploring the option to design it in available 180nm CMOS technology. I went through a paper from Chris Toumazou on a CMOS CFA and was interested in designing one. So what...
  10. E

    Commercially available CFA IC in CMOS technology ????

    Does anybody knows about any commercially avaliable CFA (current feedback amplifier ) IC in CMOS technology ? The one's I know about are all in BJT or BiCMOS technologies like AD8001 , AD811 , LT1210 etc. Thanks Vipul
  11. E

    How to design this BUFFER ckt.

    Sorry for not attaching the image earlier....but now I have attached it in this thread. This is the source follower ckt. used as voltage buffer in CFA ( current feedback amplifier) ? I want to understand its functionality and also how much offset in voltage it will give at the output?
  12. E

    How to use ".LIN analysis" in HSPICE

    How can I use .lin analysis in HSPICE to measure the impedance or transimpedance using Z parameters? For .lin analysis "port" element are required to be used at the nodes where 2-port parameters need to be calculated. ANd this port element needs the value of "resistance" and "impedance" to be...
  13. E

    High bandwidth in CFA(current feedback amplifier)

    Basically the first pole in CFA transfer function response ( which also determines it s 3-dB BW) depends only on the value of feedback resistor. (This can be seen in various AN's). And since this feedback resistor (Rfb) value is always kept constant to the value given in the data sheet , hence...
  14. E

    How to design this BUFFER ckt.

    How to source foll. BUFFER ckt. for CMOS CFA I am in process of designing a CMOS CFA ( current feedback amplifier ). And this is one of the buffer ckt architectures I have found from technical papers by C. Toumazou. But I am not able to DC bias this ckt to provide sufficient operating current...
  15. E

    On chip Reference voltage ckt for DAC

    Yes Dick .........u r right it is a simple resistor divider 7-bit DAC with 128 resistors in a chain. But my issue is about how to provide 2 ref. voltages 2.66 and 2.02 volts between which these resistors exist. ANd moreover I want these voltages to vary with power supply 3.3v so that the bias...
  16. E

    On chip Reference voltage ckt for DAC

    Thanks friends for ur suggestions.... But mine is a monolithic DAC and it is a part of an ASIC. It has to bias a sensor inside ASIC. Sensor is biased 0.64v to 1.28v across it where + ve voltage is 3.3v from power supply and -ve voltage is given by DAC and varied insteps of 5mV from 2.02 to...
  17. E

    On chip Reference voltage ckt for DAC

    Hi All I am designing a 3.3V DAC which requires a ref. voltage of 2.66 and 2.02 volts and these voltages must follow 3.3V power supply. plz suggest me some architecture of level shifter to implement this ref. ckt.
  18. E

    5.1 channel amplifier schematic required

    amplifier schematic Can u tell what will be the approx. cost of audio IC used in these creatvie speakers ??????
  19. E

    SPIE papers needed - request for papers

    SPIE papers needed 1. A. M. Fowler and I. Gatley, “Noise Reduction Strategy for Hybrid IR Focal Plane Arrays,” Proceedings of the SPIE, vol. 1541, pp. 127-133, Jul 1991. 2. S. Kavusi and A. El Gamal, “Quantitative Study of High-Dynamic- Range Image Sensor Architectures,” Proceedings of the...
  20. E

    Paper needed - Standardizing compact models for IC simulatio

    Paper needed Standardizing compact models for IC simulation Brooks, B. Circuits and Devices Magazine, IEEE Volume 15, Issue 4, Jul 1999

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