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  1. P

    What is the difference between these 2 MOSFETs? Are they exactly the same?

    I agree they look identical, usually automotive parts have a wider temp range and higher reliability req's making them more expensive, is a bit of a head scratcher that in this case the automotive is cheaper... I would get the cheaper auto part. the silicon die appear to be one in the same as...
  2. P

    Switched capacitor output common mode

    in a fully differential switch cap integrator the output common mode is set by a switch cap common mode feedback circuit. the theory of this can be applied in various ways. basically apply charge to a cap and switch the cap into your high impedance node. just remember a charged cap being applied...
  3. P

    settling time in ota

    I think you kind of answered it yourself. If you use a large input delta how do you separate settling of the amplifier with the slew of the amplifier? so to avoid this he suggest using a small input, the loopgain will be used to settle even small changes within the accuracy of the amplifier. I...
  4. P

    How to decide the polarity of the op amp in bandgap reference?

    They are referring to there is a feedback loop for A and a feedback loop for B, typically I1 and I2 do not equal, and as they mentioned you want the system to have an overall negative feedback, since the same feedback drive the pfets at the top, and 1 branch will have a factor higher current...
  5. P

    [SOLVED] [Moved]: Help identifiing element

    Re: Help identifiing element could it be a BAV105... is a melf diode with green band, which is a high speed switching diode which to me makes a lot more sense in the signal path of a piezo buzzer then a schottky since a schottky could actually disrupt the signal.
  6. P

    the size of NMOS trasistors of circuit

    This has lack of understanding written all over it. Let the kid do his homework and read his book. This is a very simple circuit and a very simple concept. the schematic is a simple exorcise to show the difference between active resistors and bias. ask yourself how do you set the currents Id1...
  7. P

    epi and non-epi wafer

    Epi layer essentially reduces the 'substrate' resistance. this is good for many things, latch up prevention in noisy environments(radiation hardening) as well as noise reduction and providing better matching of device biasing ( since the voltage at one point along the 2 dimensional plane will be...
  8. P

    how to generate Ibias =200pA/1nA for OTA ?

    Current mirrors should always be in saturation, a slight mismatch in the exp curve is big deal in subthresh compared to near flat in sat. also instead of mirroring down multiple times we use subtraction(yes math) make a current 5i and 4i then mirror both down say 5 i, then subtract the 4i from...
  9. P

    Constant Negative Current Source

    Try using larger device sizes, mosfet drain currents are slave to device w/l ratio and gate/drain voltages i dont see any device sizes, if these are mosfets in a package for pcb type use you should be able to pull up a data sheet to see drain current vs gate voltage. just remember...
  10. P

    [SOLVED] MOSFETs are not in saturations region, help please!

    it looks like you have some setup issues, the main current source is being squeezed out which starves current for the rest of your circuit. try to get your current bias up first. instead of using a voltage source to set the current, try mimicking your current branch, isourse with a gate drain...
  11. P

    noise circuit reduction

    I partly agree. for a single R and single C making a rc filter( which is the case for a typical sc sample and hold passing a stored voltage), the R value doesnt matter for the total integrated noise but i disagree thats its because the thermal noise from the switch is so small, because the kt/c...
  12. P

    noise circuit reduction

    as I attempted to explain in the 1st post, the kt/c is the result of the switch r and cap. in text books they typically refer switch cap kt/c to series resistors with a cap in the middle, in phase 1 the 2nd switch(r2) is open, so it is equal to kt/c. but in the case of charge transfer where they...
  13. P

    noise circuit reduction

    Sorry I realize describing circuits is difficult with text, thought i could get away with it with a rcr. here is what I am referring to. the inclusion of the 2nd r between the cap and ground is throwing me off. i know many just lump it into the 1st r with a simple sum, but i cant convince...
  14. P

    noise circuit reduction

    I am seeking to better understand the reduction of circuitry to simplify noise calculations. for example vnoise of resistor is sqrt(4ktr), and total noise of a resistor with a cap to ground is sqrt(kt/c) all good and dandy with the basics.( i hate relying on memorizing such answers since this...
  15. P

    Spectre pnoise settings

    Sorry but I feel you are providing design recommendations, I am looking for spectre setup variable descriptions. When I place the chopped integrator in a closed loop situation the noise drops significantly, and results seem to be very dependent on the settings mentioned above plus...
  16. P

    Spectre pnoise settings

    I am trying to perform noise analysis on a chopping integrator. can i get a better explanation on when to use the noise type source over the noise type timedomain? also does relharmnum and refsideband matter? and for chopping since I have a dc signal being integrated at a sample freq and...
  17. P

    doubt regarding FINFET netlist in HSpice

    i do not understand your issue, you define a supply vdd to be 2.5V from gnd. you then define node 1 to be equal to vdd. you next are defining a supply voltage vcc to be 1.2 from gnd. and then define node 2 to be equal to be equal to vcc. is this what your intent was? that makes your connection...
  18. P

    Regarding Negative edge D flip flop with synchronous active low set

    You drew the correct schematic, but the definition of a D latch is that when clock is low Q will not change, the question is why is your latch not working, I would try to verify the latch by itself. possibly you have miss wired in schematic? maybe something wrong with the delays ?
  19. P

    guide me to design te aspect ratio

    sounds like assignment was given by a professor who said don't use existing ratios found in the example :)

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