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    Multi voltage Design Issues

    Hi, I need some clarification on multi voltage design. Lets say a particular instance in my design is running on two different voltages. In normal mode it runs on 1.2 volts and in special mode it runs on 0.8Volts. How is that done? I mean every cell in that instance will be linked to a library...
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    Congestion analysis in IC Compiler

    In IC Compiler, there are three congestion maps namely: Placement congestion, Global Route congestion and Detail Route congestion. Whats the difference between them ? Thanks
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    Synchronizer in design

    Can anybody please explain why we add synchronizer in design? If possible could anyone please give a link to some good source where this is explained?
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    Macro Placement in Floorplanning

    While Floorplanning, what are the necessary things i need to take care of while placing macros in the floorplan area? ---------- Post added at 13:34 ---------- Previous post was at 13:31 ---------- the reason i am asking this question is because i applied different strategies but still the...
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    About Power routing being done on top metal layers..

    I am new in ASIC design and had a question.. I read that power straps are routed on top metal layers because the top layers are more conductive because of their greater thickness than bottom layers. now my question is...Is this arrangement done deliberately and if it is... why and what if the...

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