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  1. J

    Design of a VGA for commercial TV preamplifier

    I suppose you meant: if the bias (colector or drain current) decreases, the gain falls. However it implies lower linearity of the amplifier (output IP3) and that's not like to broadband signals (like several 8 MHz multiplex of DVB-T).
  2. J

    Design of a VGA for commercial TV preamplifier

    Hello all. Does anybody know how to design the typical VGA for a commercial TV preamplifier? In the picture attached, i dont know if the trimmer (7 to 22 dB) is a variable resistor or a variable capacitor. How does it work? Thank you.
  3. J

    [SOLVED] LNA with bypass switching

    Hi all. I have implemented on PCB the circuit attached (LNA with bypass) but it's not working properly. If I open the circuit at node VA, and apply an external voltage of 5V, as a control analog signal of the switch, the bypass is done by the two switches (SW1 and SW2), each one is in the state...
  4. J

    noise figure at different frequencies

    How to calculate noise figure for frequency F1 in the following system? RXin@F1 -> LNA -> MIXER1 -> AMP@F2 -> MIXER2 -> DRIVER -> TXout@F1 F1 es the same frequency for RXin and TXout. Mixer1 downconverts F1 to F2 (intermediate frequency), and Mixer2 upconverts F2 to F1, where F2<<F1 How is...
  5. J

    FM Modulator with PLL

    Hello all, in a FM modulator with PLL, I wonder if someone knows the ratio which is usually used between the PFD (phase frequency detector) and the DC modulating frequency. I think PFD must be greater than the DC modulating frequency, otherwise PLL will not work. Is that true? Does anyone know...
  6. J

    how to improve P1dB of LNA?

    Your LNA has a large bandwidth. Have you checked that the input and output matching (S11 and S22) are 50 ohms all over the band? In other words, your -20dBm P1dBin is always the same for all the bandwidth? Good matching mus be done with inductors and capacitors, and the gain can be increased...
  7. J

    Modulating data onto a DC supply line

    Why are you using capacitive coupling, instead of inductive coupling, to take out the AC signals from the VCC wire. Regards.
  8. J

    output current problems with buck converter

    Have you put the output capacitors which ensure regulation loop stable?
  9. J

    Separation of ADC signal lines and power supply.

    markdem, Of course I should put the ADC as near as possible to the analog circuit that will be converted into digital. Thus, it doesn't mind if digital traces of the ADC are too long till reach the digital board. Regards
  10. J

    Digital Clock Generator IC used as Analog Mixer LO input?

    Yakex, The main noise is due to spurious, phase noise (jitter) and harmonics all generated by a DDS or PLL. Moreover, for filtering the power supply you can place a typical PI-filter with capacitors and a choke, or even a linear regulator could be placed if your original power supply comes from...
  11. J

    How to compress AC output Vpp for pulse power detector?

    I think you cannot compress the fluctuation. Furthermore, the datasheet is giving you the dynamic range at +/- 1dB error. What's the resolution of your ADC (milivolts per bit)?
  12. J

    Modulation problem help!!

    Maybe you can represent the symbols with both possitive amplitude and phase, instead of real and imaginary parts which can be either possitive or negative.
  13. J

    Modulation problem help!!

    I dont understand you: "negative constellation points imply more bits than possitive constellation"? Why?
  14. J

    Input voltage noise or Input offset voltage?

    I think the sum of both noise and offset, because they're an AC signal onto a DC offset.
  15. J

    Lte downlink frame ( ofdm and pilots )

    Type in google 802.16 and you'll find some document explaining how the number of subcarriers must be selected, depending on your channel bandwidth and FFT points.
  16. J

    Lte downlink frame ( ofdm and pilots )

    Don't confuse guard interval (cyclic prefix) with the zero-information carriers. Zero-carriers are for preventing crosstalk with adjacent channels, but also for adapting the bit capacity per symbol to the input data structure. The guard interval must be seen only in the time domain; it must be...
  17. J

    Digital Clock Generator IC used as Analog Mixer LO input?

    Hello, your mixer is an active or a passive device? Take into account the maximum LO level allowed to the mixer. If the DDS selected has good phase noise (or jitter) for your application, you only have to filter out harmonics with a 5th order low-pass filter till 1.2GHz, however, you'll see...
  18. J

    Lte downlink frame ( ofdm and pilots )

    Hi, Scalable OFDMA (SOFDMA) is introduced in the IEEE 802.16e Amendment to support scalable channel bandwidths from 1.25 to 20 MHz. The scalability is supported by adjusting the FFT size while fixing the sub-carrier frequency spacing at 10.94 kHz. Thus, useful symbol time is 91.4 microseconds...
  19. J

    Cyclic Prefix and Zero padding

    Hi, paresh_saxena: In all familiar COFDM transmission methods (DAB, DVB-T, ISDB-T, WLAN, ADSL), both cyclic prefix (also called guard interval) and zero-padding (unused subcarriers set to zero) are being used. The guard interval cannot be used for eliminating fading: there is nothing that can...
  20. J

    Problem with OFDM system

    After serial to parallel conversion, the QAM Mapper outputs I/Q QAM symbols (amplitud-phase of the vector; or real-imaginary parts) to the IFFT block, but before doing IFFT the Framer block must insert pilots (BPSK) at various carriers within each symbol. IFFT block will then add the guard...

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