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I have to design an analog circuit for IC whose power supply is not freezed. How do I select which transistor to use from PDK library provided by the foundry?
Which parameters like VDD, Gm , Gds , Ft, Ron etc. takes priority in deciding transistor choice as per my application.
Ic package ground plane
Inside an IC package, what is the purpose of ground plane. Is it connected to the backplane of substrate for biasing it.
Is it useful only in high frequency RF circuits or required for low frequency analog and digital circuits also.
I am designing a single stage source degenerated cascode LNA. I have understood most of it theory regarding input matching but dont understand how to do output matching of thi LNA ?
Hope someone can explain it to me.
I am an analog ic designer and want a way to share my design IP netlist to some external customer without sharing actual netlist.
I believe it can be done by using macromodel. But how to create one for say opamp block. Or is their any better method.
Is it a good idea to use on chip resistor to provide biasing currents to the current mirrors in analog circuit ?
Or should self biasing "beta multiplier" ckt be used to generate this biasing current always ????
Also what are the disadvantages of using the biasing resistor external to the...
Does anybody knows about any commercially avaliable CFA (current feedback amplifier ) IC in CMOS technology ?
The one's I know about are all in BJT or BiCMOS technologies like AD8001 , AD811 , LT1210 etc.
How can I use .lin analysis in HSPICE to measure the impedance or transimpedance using Z parameters?
For .lin analysis "port" element are required to be used at the nodes where 2-port parameters need to be calculated. ANd this port element needs the value of "resistance" and "impedance" to be...
How to source foll. BUFFER ckt. for CMOS CFA
I am in process of designing a CMOS CFA ( current feedback amplifier ). And this is one of the buffer ckt architectures I have found from technical papers by C. Toumazou.
But I am not able to DC bias this ckt to provide sufficient operating current...
I am designing a 3.3V DAC which requires a ref. voltage of 2.66 and 2.02 volts and these voltages must follow 3.3V power supply.
plz suggest me some architecture of level shifter to implement this ref. ckt.
SPIE papers needed
A. M. Fowler and I. Gatley, “Noise Reduction Strategy for Hybrid IR
Focal Plane Arrays,” Proceedings of the SPIE, vol. 1541, pp. 127-133,
S. Kavusi and A. El Gamal, “Quantitative Study of High-Dynamic-
Range Image Sensor Architectures,” Proceedings of the...
pole zero analysis
Can anyone tell is it useful to use MATLAB for doing pole zero ( stability ) analysis for opamp.
Can i use values of pole-zeros given in .lis file of HSPICE to plot frequency analysis in MATLAB ????????
I find it difficult to do pole zero analysis in HSPICE and bode plot in...
Plz advice me how to go ahead with my 3 -opamp INAMP design.
i am not sure about how to decide UGB's of opamps to be used and how to do pole-zero and stability analysis of this structure ????????
any good study material if u know plz tell ????????
Can anyone suggest the way to calculate CMRR in any differential ckt. .....and if it 's possible to before hand make aproximate calculation by hand before designing.
Actually i want to make calculation for an Instrumentation amplifier???
 S. Mendis, et al, Progress in CMOS Active Pixel Image Sensors , Proc.
SPIE vol. 2172, pp. 19 (1994)
 B. Dierickx, et al, Offset-free offset correction for active pixel sensors , Proc. 1997 IEEE CCD & AIS workshop,
pp. R13 (1997)
 J. Bogaerts, B.Dierickx, Total Dose Effects on...
1. AlGaAs/GaAs quantum well infrared detectors using a waveguide with a
doubly periodic grating coupler", Appl.Phys. Lett 59 (1991) p. 857-859.
2. J. Y. Andersson and L. Lundqvist, "Grating coupled quantumwell infrared
detectors: Theory and performance", J. Appl. Phys. 71 (1992) p. 3600-3610...