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  1. M

    3 phase supply in orcad capture CIS

    3 phase supply pspice model How can I get this parts in orcad capture cis. Is thre any tutorial concern with simple 3-pahse power supply simulation. I am using v9.2 thanks
  2. M

    delay in verilog program

    I try to write the finite state verilog program that need to wait sometime in current state before go to next state. I used example : repeat (10) @(posedge clk); But error appear like this: ERROR:Xst:850 - a.v line 32: Unsupported Event Control Statement. Is there any other...
  3. M

    traffic light controller by verilog

    where can I get TLC FSM by verilog tutorials or examples. thanks
  4. M

    What is the main differnece between RUIM and non-RUIM?

    What is the main differnece between RUIM and non-RUIM. Is there any ebooks or tutorials on that concept. thanks
  5. M

    Looking for service manual of QCT-1000 WLL CDMA

    Is there somebody know where can I get the service manual (English version) for WLL cdma phone. I also want to know the pin outs for that phone (Rx, Tx, and Gnd pin), use to connect to computer.
  6. M

    basic knowledge on CDMA mobile

    cdma basic Where can I get (ebooks, links) to explain the follwoing terms and their functions in CDMA mobiles. nam, esn, dll, bin, spc, flash, scr, prl. thanks
  7. M

    How to connect WLL phone (serial) port to computer serial port?

    Is there anybody know how to connect WLL phone (serial) port to computer serial port. I mean by direct serial cable or by using MAX232 ic to design cable. thanks
  8. M

    what's wrong with this verilog code

    latch verilog code In my simple verilog code, I saw some warnings. I still don't know how to clear. And seg output is always at the default. I used Xilinx. Somebody can help me. My code warnings:
  9. M

    headache for using 7474 to design counter

    counter with 7474 I am facing sometime my counter is stuck at 0 during simple 3bits upcounter by using 7474 IC. After I reconnect again. It is work. It is happen quite often. So I need to clearify myknowledge. Normally I connect all PREset pins to VCC and all CLeaR pins to switch. When ever...
  10. M

    Which frequency will repeal mosquitoes ?

    mosquito expeller I just want to test mosquito expeller design. Is there anybody know the frequency that can expel mosquito.
  11. M

    How to test XC9572 CPLD ?

    How can I test my cpld XC9572 is working all functions. Is there any program or any method to test this. Pls let me know, I need to test my cpld. Thanks
  12. M

    Help me write a program for detecting and decoding a keypad

    keypad scan I just try to write a program which detect the 3x4 keypad and decode. I try to learn xilinx application xapp512__verilog.zip, but I still confuse how to write this program. Please show me links or examples (but please do not advise me to use google to search). Thanks.
  13. M

    should we use Resistor at input port?

    I am trying to learn verilog and downloading to xc9572 cpld during experiments. One suggests me I should use resistors at the input port, otherwise the port may damage. It is true or just over protecting. thanks
  14. M

    Help me modify my FSM (Verilog code)

    I just try to study FSM. I just wrote a FSM by using verilog. My plan is selling ticket with 15. user are allowed to add 5 or 10. whenever it reach to 15 ticket will come out and back to start state. If it reach to 20, ticket and change 5 and return to start state . It seem ok at this moment...
  15. M

    Recommend me books to study FSM

    I want to study FSM. Whcih books or Links is best to start. Thanks
  16. M

    counter in opposite direction

    I hvae design very simple 2 bit up counter by using Xilinx schematic. I am using Xilinx 7.1i and test bench o/p show correctly(0-1-2-3-0). But when I download to XC9572 cpld it show on 7-seg display as down counter (0-3-2-1). I attached my sch file for your ref. What's wrong with my sch or any...
  17. M

    Error in Xilinx 5.2i: chip viewer failed

    chip viewer failed. when I open assign package pins in Xilinx it is stuck on "Launching Application for process "Assign Package Pins". It take too long and I have to do "end task " and at that time "chip viewer failed" msg appear. I am using xilinx 5.2i (XC9572CPLD), I can use assign pin after...
  18. M

    error in model sim II 5.6e

    modelsim expecting macromodule module primitive Why this code is appear for me even simple verilog program. Every time I have to reopen .v file and find a lot of define (that I never key in) and delete. the following is some of warning: ARNING[10]: tbw.tfw(21): Bad name in macro definition...
  19. M

    powerline communication

    powerline communication is very popular last 5 years. But not much popular at this time or may be I didn't notice that. Which book is best to learn this technology and suggest me should I learn about this.
  20. M

    Recommend me a simulator for AM simulations

    I plan to do AM simulations (block by block, means mixer, modulator, demodulators...). Which simulator is suitable fo this. I familiar with (orcad, harmonica (ansoft)). I don't want to do block diagram simulations. I want to try in circuit simulation.

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