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we are looking for one to two senior RFIC designer, company located in Changsha, China.
The requirements are:
1. BSEE or MSEE with at least 3 years' industry experience;
2. Hands on design experience with LNA, mixer, VGA, PA-driver, PLL, VCO, etc.
3. Familiar with RFIC layout;
how many percent could rise and fall time exist in an sampling circuit?
Here it is used in the 2 bit AD in GPS circuit.
I think that depends on the sampling clock, signal clock and the baseband demodulation requirement.
Any formula to caculate this?
How to calculate of the requirement of Op-am when designing a filter?
It seems the wrong OP-amp might quite likely to fail the filter.
But how could we know what kind of Op-amps do we need?
Hi, I have some questions about AGC and ADC in GPS systems.
In GPS systems,
1. how long response time could tbe AGC loop have?
2. should there be a differential-to-single-ended amplifier between AGC and ADC?
3. GPS use BPSK modulation and
in the paper "A 19-mW 2.6-mm2 L1/L2...
These 2 things confused me.
In the bode plot with poles and zeroes, a zero means an increase in gain and a pole means a decrease in gain.
However, in the filters' design, a high Q could cause a ripple, that is, an increase in the gain too.
But here no zeroes.
So, do the theories contradict?
I am doing P-1db simulation with Cadence.
But the waveform is quite strange with a sudden and sharp decrease in the line.
Why dose this happen?
This phenomenom happens when some device parameters vary just a little bit!
The output impedance of the emitter follower looks like an inductance.
And it would cause a gain variation---a peak in high frequency.
Is there anyway to flaten the gain variation caused by this inductance while not affecting its other performance?
I have a question when try to estimate a mixer's NF.
How dose Cadence spectre calculate the NF of a mixer?
I mean, if we are designing a mixer with onchip input from an LNA, then the input impedance of the mixer surely won't be 50Ω.
So, when calculate the NF, which needs a value of Rs, dose it...
Why do we need voltage standing wave ration or the voltage reflection co-efficient when we just care for the power transport?
The maxim power transportation need conjunction impedance matching while the voltage reflection coefficient want the Zs=Zl as long as the Zl could not be treat as a...
I would graduate in 2006 with a master's degree.
I have been doing research on RFIC(LNA and Mixer) since I did my thesis for my bachelor's degree.
And during my graduate study,
I have been respingsible to circuit design and optimization for a low voltage supply mixer with new topology and...
I enter the matrix with i to denote the imaginary part.
But it seems that Matlab has ttaken it as a symbol.
Ohter symbols were defined.
And I read in a book that i is predefined for the imaginary parts.
Why can't it work in matrix?
And when I caculate a linear matrix, some of...
Some manufacturers offer PDK with p-cells that we could just enter W, L and finger to complete a MOST layout. But when the P-cells are not supplied, could we make it ourselves? That could simple the layout job much.
In staeyert's book it discuss about Non Quasi Static gate noise current.
As I read, it's in fact what is called the induced gate noise in other books or papers(the equation is the same.) But as I read in papers, the induced gate noise is not only the Non Quasi Static gate noise. The papers would...
I find this kind of model on standfords website,
from **broken link removed**
and the model subcircuit is as follows:
** Noisy NMOS model (note: noisy PMOS models is not provided)
.subckt NNMOS vd vg vs vb w=1.2u l=0.35u nf=1 sx=1 dx=1