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  1. torbai

    How to simulate PLL phase noise in Simulink with basic blocks?

    I have trouble simulating PLL phase noise with Simulink. It is not a problem for me to build PLL model in time or s domains from scratch, but I have no idea how to simulate the phase noise (and jitter) in Simulink. Could you please help me if you know how to do it?
  2. torbai

    How to differentiate NC drill layers in Gerber files?

    I recently designed a 6-layer PCB using Altium Designer. The board contains multiple sets of drills including through vias, blind vias and buried vias. When I exported the Gerber and NC drill files, I found that the suffix of NC drill files is just txt, tx1, tx2, etc. So here is my question: How...
  3. torbai

    Problem about output pin of ADF4351

    I am reading the datasheet of ADF4351, and I have a question about its output pins. The output pins are differential, and I desire a broadband output matching. The recommended method in datasheet(page 27) is using a 50 \[\Omega\] resistor connected between pin RFOUT and power supply. But there...
  4. torbai

    Finding the Bias for an FET using ADS (Advanced Design System)

    Hi srv_123 Oh, PA.... I think there is a much more easier way: there are several videos on youtube, like https://www.youtube.com/watch?v=WAingaHfBMs. And below the video display window, there is a link which links to a project file developed by Keysight. I'm pretty sure those videos and files...
  5. torbai

    Finding the Bias for an FET using ADS (Advanced Design System)

    Hello srv_123 I assume you are designing a LNA. The quiescent point determines not only the DC current flowing through the transistor but also other performances like noise figure and linearity. I don't think you can get those kinds of information only through a single IV curves plot. You can...
  6. torbai

    How to simulate a HF ferrite core transformer in ADS?

    The ideal transformer is a choice, but it doesn't have any input and output inductance. How to simulate a HF ferrite core transformer in ADS if the input and output inductance need to be included?
  7. torbai

    Should I worry about stability due to harmonics in Class E PA design?

    Hello all I'm designing a Class E PA at 13.56MHz. I find that Freescale MRFE6VS25N, which can work from 1.8MHz to 2GHz, is very suitable for my design. https://cache.freescale.com/files/rf_if/doc/data_sheet/MRFE6VS25N.pdf However, the wide working bandwidth makes a new issue: Will the...
  8. torbai

    How in import differential S-parameters in ADS

    Hello. I've simulated several rings model in CST using lumped ports which have no reference node. When I import the S-parameters into ADS, I found that all ports are single-end and connect to a reference node, the ground in most cases. However, I really need them not connect to a same reference...
  9. torbai

    ADS_SPC_IF problem while importing pspice file into ADS

    Problem solved. Yes, the method I posted previously is an eligible answer to this problem.
  10. torbai

    ADS_SPC_IF problem while importing pspice file into ADS

    I have encountered a problem when importing pspice model of GaN transistor EPC2015 into ADS. The generated file includes a statement "ADS_SPC_IF" which is said "not defined" in ADS. How can I solve this? Can I import it into a net file, other than a schematic file, and then modify it with the...
  11. torbai

    [SOLVED] Can we simulate far field in ADS EM Co-Simulation with lumped elements?

    That's true. That is what I know. But my problem is to get the far field result which is mainly derived from the EM data. So I'm thinking whether we can get the far field data from co-simulation which can save a lot of time if the board is unchanged. I guess the answer is negative....
  12. torbai

    [SOLVED] Can we simulate far field in ADS EM Co-Simulation with lumped elements?

    A friend of mine is designing an antenna with lumped elements and diodes mounted. The spice model of the diodes can be found in the internet. In his design, he needs to choose a proper bias to achieve his goal of the gain or bandwidth of the antenna, or something else. I found that the EM...
  13. torbai

    How to reduce S21 of an amplifier at undesired frequency to improve the stability?

    Well, according to my limited knowledge, cascode is to improve stability by reducing the Miller capacitor, right? Should I have to use a RLC feedback in a cascode amplifier? I know adding a resistor at the gate of the common-gate stage could improve the stability, I've already done that. That...
  14. torbai

    How to reduce S21 of an amplifier at undesired frequency to improve the stability?

    I'm designing a cascode amplifier for 2.45GHz right now. At 2.45GHz, All S-parameters are fine: S11=-13.7dB, S22=-14.7dB, S21=17.7dB, S12=-26.8dB. But at undesired frequency, like 1.2GHz, S21 is still so large(S21=21.2dB) and both S11 and S22 are poor(-1dB and -3dB). Why is S21 still so large...
  15. torbai

    How to reduce S21 of an amplifier at undesired frequency to improve the stability?

    I often find that at some frequency(usually below the working band) S21 is still large(say above 15dB) while both S11 and S22 are poor(sometimes closed to 0dB). This obviously deteriorates the stability factor and makes the amplifier conditionally stable. How can I reduce S21 at those undesired...
  16. torbai

    Help need for obtaining EM Co-Simulation for 1GHz LNA design in ADS2011.10

    It is exactly what BigBoss has mentioned. But if you're using ADS 2014 or 2015, you'll find there is a "Co-Simulation" selection you can choose in which you don't need to add every port to lumped elements. It is very convenient.
  17. torbai

    RF LNA design help is needed (ADS)

    Please check your connection, do you get them right?
  18. torbai

    RF LNA design help is needed (ADS)

    What about the gain without matching elements? Is it above 0dB?

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