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  1. butterfish

    Hspice post simulation with *.spf file

    Hi, I'm doing a post simulation with a .spf netlist. my simulator is Hspice, job concluded. I can see the waves of input signal but no output waves! .probe option doesnt work, why? anyone knows? Best regards!
  2. butterfish

    transmission line model in Hspice?

    transmission line model and spice Hi, all, Anyone knows, for Hspice simulation, how to model a transmission line with 50 Ohm impedence character? Thanks !
  3. butterfish

    how to print layout image into word.doc??

    Hi, all, My layout tool is L-edit11.1, I want export the layout image to word document, what shall I do?? Anyone knows? thanks in advance!
  4. butterfish

    looking for 100MHz phase/frequency detector chip

    Hi, all, I have two 100MHz frequency, and I want an IC with simple PFD+charge pump for some experiment on bread-board. Anyone knows how can I find this IC? can you tell me the name of the chip? thanks in advance!
  5. butterfish

    100MHz phase/frequency detector

    phase frequency detector Hi, all, I have two 100MHz input frequency, and I want an IC with simple PFD+charge pump for some experiment on bread-board. Anyone knows how can I find this IC? can you tell me the name of the chip? thanks in advance!
  6. butterfish

    how to divide a sin-wave by 2 with a simple way?

    sin-wave divider?? Hi, dear all, My question is how to divide a sin-wave by 2 with a simple way? There is a 128MHz sin-wave (0~0.6v, from crystal oscillator) input, and I need a 64MHz output (output can be sin-wave or square wave, 0~0.6v, differential output would be the best)...
  7. butterfish

    How to simulate phase noise of PFD?

    Hi, all Now I 'm design a APLL and I want to optimize bandwidth for minimize phase noise, the phase noise of PFD and VCO are necessary. but the output of PFD&charge pump is a discrete singnal, how to simulate the phase noise of PFD and charge pump in Hspice? thanks in advance!
  8. butterfish

    poles/zeros in LDO design

    I'm a newbie in LDO design. I don't know how to do pole/zero analyze and how to do frequency compensation in LDO. Any basic paper or book for this? Thanks in advance!
  9. butterfish

    30v power supply bandgap design

    My power supply is from 2v to 30v, I need design a bangap generate a 1.2v reference voltage, with standard CMOS process. Any idear or paper? thanks for your help!
  10. butterfish

    Diode varactor:How to increase capacitance vary range?

    Hi, I need a diode varactor can integrate in IC, when add reverse bias voltage from 0~3v, the capacitance varies as large as possible. For N+/Psub diode in standard CMOS process, when reverse bias voltage from 0~3v, capacitance vary only 2 times, how to get larger vary range...
  11. butterfish

    varactor in standard CMOS process

    Hello everyone, I need design a 10~20pf varactor on chip, between a 27MHz signal to GND. Anyone knows how to design it? Can I use the standard N+/Psub diode as varactor? Thanks a lot!
  12. butterfish

    Looking for info about VCXO and Varactor design

    Anyone has resource about VCXO(voltage controlled crystal oscillator) or Varactor (on chip) design? or application note about VCXO IC? Can you share with me,thanks a lot!
  13. butterfish

    Help: VCXO papers and books

    Hi, Anyone have papers or books for VCXO? Can you share with me, thanks a lot!
  14. butterfish

    Help: 32K oscillator startup problem

    Hi, all, It's a 32k crystal oscillator with open drain output. 1> when 10K pullup resistor was added, if pullup VDD>3v, it cannot startup, the vpp of x1,x2 are almost 0v, output a random wave. 2> when pullup VDD<3v, it can startup. 3> when removed pullup resistor R1, osc can...
  15. butterfish

    How to analyze this voltage buffer?

    Hi, it's a low current voltage buffer that confuse me. where n5 gives a constant tail current about 40nA. Vout follow with Vref. My question is: why add n4 here? what's the advantage of this circuit? waiting for your help,thanks! fish

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