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  1. Willt

    Metal antenna ratio is not cumulative, but why?

    Hi all, Most of the material discussing antenna rule says that metal antenna ratio (AR) is not cumulative (e.g. just count M2 alone, not M2 and M1 together). But why? Is this because the gate leakage discharges the metal which is already fabricated? Maybe for more advanced technology...
  2. Willt

    Via location on power line

    Hi guys, I'm wondering where the via location should be on the power line, considering resistance, current density and fabrication performance. Take the following picture as an example. Which one approach do you prefer? Any reason? Thank you very much for your feedback :grin: Will
  3. Willt

    [SOLVED] Virtuoso Layout Bindkeys for flip MX, MY

    Hi brothers, I know the function to do rotate by bindkey "leRotateCB()" How about flip MX and MY by bindkey after clicking move or copy? I know Key F3 can do the operation, and then click MX/MY buttons Thanks a lot Will
  4. Willt

    Gate-level Netlist TO RTL Netlist

    rtl netlist Hello guys ~ I would like to know: Is there any tools that can transform gate-level verilog netlist TO RTL verilog netlist? Your guidance is highly appreciated !! Will
  5. Willt

    Tuning Fork in IC Layout

    Dear all, What is the function of tuning fork in flash memory IC layout? Is it used for positioning the core array? Is it allowed to place transistors under tuning fork? Thank you for your sharing in advance. Will
  6. Willt

    Low Pin Count (LPC) Devices

    Hi friends, Any advantages of using low pin count (LPC) devices?? e.g. LPC MCU Any information? Thank you very much for your help in advance. Will
  7. Willt

    Free Viewer for .trn File

    trn viewer I would like to know whether there is free software/viewer for NC Verilog simulation results (.trn files)? Thanks a lot. Will
  8. Willt

    Any IC Design House in Denmark??

    denmark ic design Hi friends, Is there any IC design house in Denmark? Thank you for your information in advance. :D Will
  9. Willt

    The architecture and operation (read, program & erase) of EEPROM

    Dear friends, I'm interested in the architecture and operations (read, program & erase) of EEPROM. Any document, reference or link about these? Any help is highly appreciated. Thank you :D Will
  10. Willt

    Hspice Convergency Issue

    Dear friends, I am now studying convergency issue in Hspice. As all of you know, convergence is defined as the ability to obtain a solution from a set of circuit equations within a given tolerance criteria. Could anyone explain the above mentioned definition using a simple example? Your help...
  11. Willt

    Closed-Loop Gain Simulation

    loop gain simulation Hi friends, How could I simulation the closed-loop gain of boost converter? Any document or reference? Your help is highly appreciated. ^.^ Will
  12. Willt

    Error Amplifier Design

    Hi friends, I want to design an error amplifier for PWM dc-dc boost converter. It only drives capacitive load so I think OTA is needed. (1) How much should the gain be? How does the gain affect the performance? Line regulation? Load regulation? Or something else? (2) The frequency of the...
  13. Willt

    DCM Boost Converter Simulation Problem !!!

    Hi friends, I'm simulating a boost converter in DCM. The inductor current is supposed to decrease until zero during the switch is OFF. However, from my simulation results, the inductor current drops to -ve values. Why come?? How to solve such problem?? L = 400uH C = 100nF R = 3.3k SW is large...
  14. Willt

    Question regarding Vout of a charge pump

    Hi experts, I have a question regarding charge pump. Vout of charge pump = (n+1) Vdd where n is the # of stages Q1. In practice, Vout never reach (n+1)Vdd. What are the causes? Q2. When the # of stages increases, Vout does not increase PROPORTIONALLY. Why?? Your comment is highly...
  15. Willt

    Minimum Width of Metal Drawn

    Hello friends, Just interested to know: Why is the minimum drawn width of top-level metal always larger than that of bottom-level? For example, to pass DRC: Wmin of M5 = 0.44um Wmin of M1 = 0.26um Thanks for your answering in advance. Will
  16. Willt

    Metal or Polysilicon Used as the Gate?

    Hi friends, In the old days, metal was used as the gate of MOS. But now, polysilicon is used. Metal has a lower resistivity than polysilicon. What is the reason for using polysilicon now? I think of a few reason: 1. Polysilicon is easier to stick to silicon oxide. 2. Polysilicon can achieve...
  17. Willt

    Efficiency VS Duty Cycle

    Hi friends, I am designing a boost converter. From the simulation, the efficiency decreases as the duty cycle increases. Is this because more power is consumed in the inductor-NMOS path as the NMOS ON time (duty cycle) increases?? Your comment is highly appreciated ~ Will
  18. Willt

    Doping Concentration of P+, P, P-

    concwentration in p+ Hi friends, I'm now studying a course related to semiconductor device. As far as I know, the doping concentration of: P+ = 10^18 / cm3 P = 10^15 / cm3 How about P- ?? Any information about the doping concentration of P- ?? Is the doping concentration of P- less than...
  19. Willt

    Adjustable Reference Voltage Design

    Hi experts, Is there any paper or document related to adjustable reference voltage design? For example, I want a supply-independent reference voltage which can be tuned using control signal (digital or analog). Is it possible to implement such kind of circuit? Your comment and guidance are...
  20. Willt

    Recommendation for learning Device Physics

    Dear friends, I want to learn more about device physics. Are there any good books recommended for learning device physics?? Any guidance is highly appreciated. Best regards, Will

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