Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Re: verilog to schematic
Are you sure Active-HDL can convert .v codes to schematic?
I know it can do it inversely, i.e. you can plot a schematic in active-HDL and it will provide you the base of your verilog codes (input, output, reg, ...), but I couldnot find what I wanted.
I am sure...
verilog to schematic
I am almost new to hardware design. I have a Verilog project written in Al.tra Qua.rtus II. It is so hard to go through the codes. I wonder if there is a software which can convert this project to a block diagram or schematic.
i am working with modelsim 5.8, i have written my verilog codes and modelsim can compile all of them. but when i want to load my top module after loading all modules it writes
#Error loading design
why?? what can i do??? i really couldn't solve it.
As i have been reading FPGA documents I encountered some terminologies in I/O topic which i cannot realize their meaning. what is the meaning of:
single ended I/O
these words are widely used in spartan-3 Xilinx documents!
i just have downloaded them but not very quick guid. i wanted a book which teach me verilog veri quickly. i found it and have uploaded it for others. as Introduction to verilog. (Peter Nyasulu)
I am a new user to verilog programming and i am trying to find a good e-book from beginning to end. I have checked the edaboard UP/Downlopad but it seems non-of them are suitable for me. any one have any idea??
C converter t verilog
Perhaps nobody could understand my question. for example if you want to work with one of TMS up it is not neccessary to read it its assemply completely. it is sufficient to write your program in C and then run a program lik cgen which convert your C codes to assembly...
DSP on FPGA
implemention of filters (FIR/IIR) is quite easy(if they are not adaptive).just calculate your filter coeficients and then store it.then get your data in a register and do the canvolution.nd go on.but there is some details about convolution.do you see Openhaim. "Discrete time signal...
Hi every one
I am a new in FPGA and starting to learn spartan-II of Xilinx but there is some words in it i donot understand that can anybody explain them.or introduce a site for them:
if anyone can each of these understandig words for me i will be very...