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    What is meant by macromodeling of power?

    What is meant by macromodeling of power. How does it differ from micro modeling. Pl. help me with an example
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    What is the difference between micromodeling and macromodeling ?

    Hi All, What is meant by power macromodeling in digital circuits What is the difference between micromodeling and macromodeling ?
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    Need link to MCNC benchmark circuits

    Hi All, Please help me to get the tar ball or www link of MCNC benchmark circuits. The link specified in literature (www.cbl.ncsu.edu/CBL_Docs/Bench.htm) for the same is not working. kindly help me
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    in a CMOS circuit, what is meant by drive strength ?

    in a CMOS circuit, what is meant by drive strength ? For example in TSMC cell library there are cells labeled AOI221X1 AOI221X2 etc. What is the significance of X1, X2 etc. Kindly give me a detailed reply by stating the defenition of drive strenth, signaifcance and factors affecting drive...
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    What is meant by drive strength?

    Hi All, In a TSMC cell like AOI221X1 what is meant by drive strength ? Pl. give me a detailed explanation of the same
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    I can bring workspace switcher to control panel

    workspace switcher I am using fc4 and suddenly all desktop settings changed and all my control panel setting changed. Now I am unable to bring workspace switcher in to control panel. Kindly help me to solve this. with thanks
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    Need free software for converting edif to verilog

    Is there any free conversion utility to convert edif description to verilog? Pl. help me in this regard
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    switching transition count

    For given large combinational or sequentail gate level circuit, how can I calculate total switching transitions (0->1 and 1->0) provided that two input vectors in sequence. Kindly suggest one efficient idea so that I can implement it effectively
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    Latex error concerning beamer class

    I have installed beamer class as root and class fiel are stored in the directory /usr/share/texmf/tex/latex/beamer/base. But while I am trying to run one simple tex program it is showing error as shown below. ash-3.00$ latex test.tex This is TeX, Version 3.14159 (Web2C 7.4.5) (./test.tex...
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    Question about analyzing gate delays

    gate delay Hi All, I have a basic doubt in gate delays. When we analyze the gate delay of and gate in 90nm , 65nm and 45nm technology which one is more. Pl. give me proper exlanation and justification for the same
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    rcx extraction problem in 90nm technology

    delay in 90 nm Hi All, How can I calculate typical basic gate delay for 90nm and 45 nm technology. Can anyone suggest materail or approaches for the same. My aim is to calculate a encoder circuit delay in 90nm and 45nm technology implemenattion. Pl. help me
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    TSMC 90nm Cell library

    I am in need of TSMC 90nm Standard. Cell Library Databook very urgently. Kindly help me in this matter.

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