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  1. D

    What is Post-layout simulation??

    thanks !
  2. D

    How to determine ∫x^xdx ?

    Re: How to determine ....... someone told me that x^x = e^(xlnx) , can i find solution ???
  3. D

    How to determine ∫x^xdx ?

    How to determine ....... what is the answer ??? please show the step, thanks !
  4. D

    Links to free layout tools

    Re: free layout tool Magic ???
  5. D

    Is the common centroid method obsolete ?

    Re: Common centroid If this is an analog layout, will any problems come out when using 10x4K resistor ???
  6. D

    Is the common centroid method obsolete ?

    Re: Common centroid i repost it, thanks !
  7. D

    Is the common centroid method obsolete ?

    Re: Common centroid i have another question is how to change the 40Kohm to active load? use PMOS or NMOS and how to find the W/L ratio ? thanks !
  8. D

    Is the common centroid method obsolete ?

    Re: Common centroid Hello, i don't understand what mean "the ratio in interger number:7 or 8, not 7.5!" and below is the overall circuit, which transistor need to do matching ??? How to see which transistor need to match ??? any rules ??? If PMOS can not match with NMOS, any method to match...
  9. D

    Is the common centroid method obsolete ?

    Re: Common centroid Please see below picture, M1 & M2 is very large(66u/0.8u) and M8 (2.4u/0.8u) & M12 (1.2u/2.4u) is much smaller, When we do the layout, do we use the Common centroid Method so that M1 & M2 divide into a few part to match M8 & M12 ???
  10. D

    Is the common centroid method obsolete ?

    Re: Common centroid oh ~ i have a problem is: If i have a PMOS1 and the ratio(W/L) is 66u/0.8u , NMOS2 14u/0.8u, PMOS2 2.4u/0.8u, the size of PMOS is very very large compare with PMOS2, can i use Common centroid method the match the size ??? thanks !
  11. D

    Question about laying a 40Kohm resistor in IC design

    Re: Resistor Problem ! What is the function of "multiples of 3 or 4" ? Added after 3 minutes: I'm afraid that using MOS transistor to replace the resistor will affect the bias current. Will that change the bias current ??? thanks !
  12. D

    Question about laying a 40Kohm resistor in IC design

    Re: Resistor Problem ! Thank ! I'm doing a analog design and using Cadence GPDK Technology, In the manual, the sheet resistance table only show: Layer (in ohm/square) Poly 7.5 N+ Diffusion 300 Metal 1 0.1 Metal 2...
  13. D

    Question about laying a 40Kohm resistor in IC design

    Resistor Problem ! Hello, I'm a new hand of IC design, I want to ask the question is, Can I lay a 40Kohm resistor ??? Is it possible/suitable ? Because I find that the process sheet resistance of Poly is 7.5 ohm/square , N+ Diffusion is 300 ohm/square. Are the layout will very very large ...
  14. D

    How to write this VHDL program to convert codes??? Thanks !

    manchester vhdl Hello, I want to use NRZ(non return to zero) for input, then convert to Manchester code, how can i write this program ??? any reference ? thanks !
  15. D

    Analog IC Interview Questions

    what is the question 1 answer ???
  16. D

    How to simulate 741 CMRR and PSRR ?

    simulate cmrr source i try to give a positive feedback, but the result is not correct too....
  17. D

    How to simulate 741 CMRR and PSRR ?

    simulate psrr Hello, I have try the simulation, but... why the curve is invert ??? How can i fix this problem ??? thanks !
  18. D

    How to simulate 741 CMRR and PSRR ?

    how to simulate common mode rejection ratio The circuit only contain one LM741, thanks !
  19. D

    How to simulate 741 CMRR and PSRR ?

    positive power supply rejection ratio If i use cadence for simulation, can anyone show me the testing circuit schematic ??? I try many time, but it can't work.... thanks !
  20. D

    How to simulate 741 CMRR and PSRR ?

    cmrr in op amp 741 Thank all information !!! Let me try it, thanks !!!

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