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  1. P

    why preferred way to shield critical signals is by vss and not vdd?

    (working with layout team in memories..) why bitlines/wordlines are shielded by vss (most of the times) and not by vdd?
  2. P

    How to debug software running on SystemC Virtual Platform ?

    How can a software be debugged which is running on a SystemC/TLM based virtual platform. How can i pause the simulation (halt the virtual microcontroller at a particular instruction) and later on resume to continue the software simulation on the very same virtual platform.
  3. P

    Error while compilng systemc part of UVMC-2.2

    The supported version for gcc for my simulator is Minimalist GNU for Windows (MinGW) gcc 4.2.1. I have it installed on my hard-disk. I have tried compiling the sv part of the uvmc-2.2. It compiled successfully. Then I tried compiling the sc part using sccom and it failed with the above...
  4. P

    [SOLVED] how to create an instance/object for SystemC model in SystemVerilog Class

    Can you please explain it in detail. And does this 'wrapping a driver/monitor around SC module' needs UVM Connect library. P.S. - I am using a UVM based testbench, I know that UVMC fits the bill but somehow I choose not to use the predefined library if there is an other way around. - - -...
  5. P

    [SOLVED] how to create an instance/object for SystemC model in SystemVerilog Class

    I am trying to use a SystemC reference model in a UVM based test-bench. what can be the possible way for creating an instance of SystemC module (class) in a SystemVerilog class. I have tried using SC_MODULE_EXPORT but it allows me to create an instance in Verilog/SystemVerilog module as design...
  6. P

    why use SVA in a model/predictor based design?

    Hi all, I have a model or predictor based verification environment. Each and every signal from the DUT is compared with that of the model to check the correctness of the design. Now my question is, in this type of verification environment where the model keeps a check on all the functionality...
  7. P

    MinGW needed for modelsim 10.1c

    I am trying to integrate a SystemC model in UVM based testbench. Currently I am using Mentor Graphics Modelsim 10.1c (for windows) but while compling some system c code, it showed an error, ** Error: (sccom-95) Your installation directory does not contain the appropriate GNU C++ compiler...
  8. P

    MinGW needed for modelsim 10.1c

    I am trying to integrate a SystemC model in UVM based testbench. Currently I am using Mentor Graphics Modelsim 10.1c (for windows) but while compling some system c code, it showed an error, ** Error: (sccom-95) Your installation directory does not contain the appropriate GNU C++ compiler...
  9. P

    [SOLVED] verification of a CPU using virtual c code

    i was not really very sure of the title i wanted to put in, as the space provided was too short for what i intended to say,, well this is what i wanted to ask help for, i intend to verify a cpu at a level with all the essential items and some peripherals attached to it i already have an...
  10. P

    using C programs in SV, DPI

    I have been trying to use DPI to use some functions i've made in C, in SV.. but somehow m not able to do this thing. and the other way around , i.e. exporting SV functions in C was also a waste of time for me.. This is what i have tried doing, in C side i wrote a dummy program say, int...

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