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    Flash ADC - Which are the inputs of the ENCODER

    I'm designing a full Flash ADC , my project is similar to that one presented in "adc 4 bit.pdf". I have simulated all the stages and I obtained the same results..Now the problem is: Which are the inputs of the ENCODER? I mean,if you look to the pdf file,in the first page,section II.System...
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    CML comparator in 65nm CMOS - design rules

    CML comparator Hello everyone. I need to design this circuit for a full flash ADC 4 GS/s in 65nm CMOS. There are some rules to do that? for example, how can I choose W, I bias and Rload for this circuit? please, I need a big help. circuit:
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    Some questions about flash adc

    Hi all, I'm designing a full flash adc,5 bit, 4 GS/s. I have a big doubt about the choise of Vref. in many papers i saw that there are Vref+ and Vref-, why? for example if the input is a sinewave Asin(2*pi*fin*t) with A=1V, power supply is 1.2 V, How can i choose Vref+ and Vref-? In this...
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    How to simulate random offset of the comparators in Matlab?

    Hi all, I have a little problem with the design of a full flash ADC, now I have to simulate the random offset of the comparators with matlab but I have no idea how to do this. Someone can help me?

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