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  1. W

    How to size transistors of this circuit

    I have attached circuit and I am gonna run simulation. Before running simulation, transistors should be correctly sized to get the output. I know how to size M5, M6 and M7 transistors in the figure, but the problem once having a voltage doubler (M1-M4 transistors). This voltage doubler affects...
  2. W

    Drain-source resistance (R_{DS(ON)}) of power MOSFET for Boost/Buck converter

    How to calculate drain-source resistance of power MOSFETs for boost converter?
  3. W

    Why input voltage of boost converter is increasing exponentially

    I design a boost converter which is good at operating with a fixed voltage source. However, once a voltage in series with resistor is used as a source. The input voltage of the converter is increasing. The converter has input capacitor which is ten times greater than the output one. It is...
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    plot 20GB tr0 hspice file

    how to plot large size .tr0 output file?
  5. W

    Micro watt range boost converter design

    I want to design a boost converter which operates input 100mV and steps up to 1.5V with 0.13um cmos technology. Assume, I have 0.6 to 1V external voltage source to power up control circuit. What are the crucial stuffs in design should be considered and how to deal with them? Attached the circuit...
  6. W

    How to calculate power losses of a boost converter in an easy way.

    I know some power losses in a boost converter; conductance losses, switching losses, inductance losses and others. Is there any easy and quick way to calculate these losses from hspice simulation results? What are the most suitable equations for calculating these losses? Thnx.
  7. W

    Why boost converter inductor current and output capacitor current are different

    I designed a boost converter in DCM with 90nm CMOS technology. My output should be 3.5V and input is connected to a capacitor through a switch. When cap reaches 1.8V, switch is on and the converter connects to the cap. Once the cap downs to 1V, switch is off. Simulations are carried out in...
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    Charging large capacitor(1F) in hspice/cadence

    I have a charge pump whose output is connected large capacitor e.g. 1F, 2F with 4 stages, stage capacitor 250pF and supplying .6V. If it is like 10nF, it is easy to monitor charging of the charge pump by running simulation in hspice. However, large capacitance at the output takes long time...

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