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  1. M

    Test compression - internal and external flow

    When we use internal and external flow in test compression? What are the advantages and disadvantages of both?
  2. M

    Factors that affects BIST sharing

    Hi, I wanted to know what are the factors that affects sharing of MBIST logic ? Few things which i can think of are 1.Data size of the memories 2.Clock speed of the memories 3.Address space of the memories. Let me know the other factors that affects the sharing of MBIST logic
  3. M

    How to fix RAM A1 and A7 violations ?

    How to fix the following issue? // Warning: 1 RAM write/set/reset lines not forced off when write controls are off. (A1) // RAM dynamic PASS_THRU testing cannot be used. // Warning: 1 read lines not forced off when read controls are off. (A7)
  4. M

    Regarding Shadow logic

    what are the advantages and disadvantages of different types of shadow logic( shadow logic with register sharing & shadow logic without register sharing)?
  5. M

    ***regarding scan compression***

    Hi Can anyone explain how scan compression happens & how exactly pattern compression & decompression is done with an example?
  6. M

    Definition of few terms

    What is tester cycle in dft?
  7. M

    Require cadence synthesis user guide

    HI can anyone share cadence synthesis user guide?
  8. M

    How scan chain testing is done?

    how scan chain testing is done? How faults are detected using test vector & how patterns are compared so that we can find mismatch in test patterns?
  9. M

    Minimum Number of scan chain in a design

    Can we have only one scan chain in a Design?
  10. M

    [SOLVED] Open source Dft tools

    HI Is there any open source DFT tools to perform scan insertion,compression,ATPG?
  11. M

    New to Synthesis,require help

    Hi I'm new to synthesis. I want to learn synthesis from basics.I want to know the topics that are helpful for understanding synthesis better.

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