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ocd commander internal error
Sorry for the late reply.
I know somebody who have used my idea to rebuild a more optimized version of the Chameleon Pod with the Lattice PLD. By my self i haven't had enough time for this.
Best is, there is no additional power supply used.
At moment he works on...
If you want start very cheap with a proAsic Design, just buy the available starterkit.
it is about 250$ and you get for this few bucks already a Flashpro lite, on eYear of Libero Gold license, a development board with aAPA300.
Just plug and play (code).
reverse engineering avr-ocd logic analyzer
thanks a lot.
Now only some information about the RAVEN code could be useful for me.
The other configuration are already available by schematic for single solutions.
I think on a new PLD solution with an other (better) PLD, than the...
raven jtag schematic
According the documentation, the cable is the same for Raven and Wiggler mode.
So just config it to wiggler mode and check the signallinks to the 2. sub-d connector according the schematics of wiggler, which can be downloaded everywhere.
Please send me your results :-)...
Can anybody tell me the differences of
pipelined and flow-through syncronous burst SRAM like it is used for
MPC555 or 565.
I can see the additional registerbank in the pipelined version but what is the different behavior of both.
You are really great :-)
Read the upper postings. You will see we already taked about it.
It is simple really indeed but you have to spend 24 pins just for nothing.
If you compare the costs and what you get, you will see, that a 244, a 245 and a small PLD (S or C) will do the job great...
Maybe you mean the 82257 instead of 82256?.
This have i also already done. There the only problem is the Ready to DSACK conversion, because the Ready did go to late to ready.
The 82257 have also a mode which can handle the standard 6833x bus (non-multiplexed). So no big problem. (only if the...
For a design i have to couple a SJA1000 Can Controller with multiplexed
(Intel) interface (/RD,/WR,ALE) to a Motorola
MC68332 with have only non-multiplexed Address and datalines.
Have anybody already a solution for this problem?
Or can give me some hints.
THe other direction (multiplexed to...
But there are the next problems.
My power is driven by a 3 phase 400 Volt AC source without Middle (N)
with this source a transformer is feeded to generate 230V ac potential free.
This 230V is transformed by a transformer on my PCB to 18V AC.
18V AC to 24V DC then via linear...
For a project, which shall run in industral environment (high noise and EMC) i have to design a very good switch closer input interface for a microprozesor.
It shall be very low cost.
Also the input voltage range need to be 24V (20-28V)
And it need internal pull up against 24V that with a...