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    International MEMS Forum Centre

    mems forum International MEMS Forum Centre www.memspub.com This is a new Forum of MEMS, please come here and share your ideas and experience here. Micro-Electro-Mechanical Systems (MEMS) is the integration of mechanical elements, sensors, actuators, and electronics on a common silicon...
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    can we use battery as power supply to reduce noise?

    Normally, how much noise can the battery induce? Is it lower than signal generator power supply? Many thanks
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    how to simulate gilbert mixer in lock-in amplifier?

    lock-in amplifier howto I am designing a gilbert mixer for using in lock-in amplifier. The LO and RF freqency is same(10kHz) to generate a dc voltage to be measured, I think it is a simplest useage for a mixer, can any one tell me if I need to use PSS, PAC and Pnoise in cadence to simulate the...
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    Is ESD protection essential?

    I just wonder if we must include ESD protection on every pad? In the low noise and low leakage current application, the input pad should be away from ESD protection, is it right? But is it safe from ESD? Does anyone know if the commercial opamp input has ESD protection? Many thanks Yong
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    about low noise pmos buffer design

    I plan to design a low noise pmos buffer, which need large input and output swing rang, I have two topologies, can any one tell me which one is better? or any other topology is better than these two? Many thanks 1. I have a 5uA current already in my design, can I use 10X current mirror to bias...
  6. M

    lock in amplifier IC design

    I plan to design a lock in amplifier IC to sense weak signal from noise, can anyone give me some advice or share some experience? I have no idea now. Many thanks Yong
  7. M

    is post layout simulation obligatory?

    Hi, I design an ic using an opamp cell from CDK, but the CDK can not do the post layout simulation including the opamp cell, my quetion is: 1. I don't want to design the opamp by myself, is there any problems for using the opamp cell from CDK? 2. what is the postlayout mainly for? I think it...
  8. M

    lock in amplifier IC design

    lock in amplifier ic I plan to design a lock in amplifier IC to sense weak signal from noise, can anyone give me some advice or share some experience? I have no idea now. Many thanks Yong
  9. M

    current mirror problem

    I have a 5 uA refference current, I need 200uA current by current mirror. can I use one current mirror with very large w/l (>100:1) to get this 200 uA current? Is there any problem? thanks a lot
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    How to design 1G ohm MOSFET resistor?

    mosfet resistor I need to design a 1G ohm resistor on chip to dc bias a trans_C amplifier, I know I should use CMOS FET method, but how to realize it? Thanks advanced!
  11. M

    cadence shortcut key problem

    cadence shortcut keys Hi all I meet a problem on cadence shortcut key: I use X-win32 ssh remote logon cadence, I can use mouse and some keyboard keys such as esc, but I cannot use the most of shortcut keys such as i, [, p... I can type any keys in shell, so i think the problem isn't from...
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    about parasitic capacitor between pads

    Does anyone know the value of parasitic capacitor between two pads on chip? several pf? And if we connect two naked chips by wire bonding their pads, how many pf parasitic capacitor is induced? Many thanks

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