# Search results

1. ### How to size transistors of this circuit

Is it possible to add a circuit between voltage doubler and the capacitor Cc? The design circuit should allow the capacitor charged from the voltage doubler meanwhile M5 is OFF. Once the transistor M5 is turned ON, the circuit should disengage the voltage doubler. The reason for designed circuit...
2. ### How to size transistors of this circuit

Large size voltage doubler means high power degradiation (i.e. low power conversion efficiency). I am aware of voltage doubler in the figure should have large size, but overall power efficiency is expected to be low.
3. ### How to size transistors of this circuit

You mean M5/M1<<2, M6/M1<2 Also, for voltage doubler, clock drivers (CLK, CLKB) should have large size, shouldn't they? Wow, the design will have large area.
4. ### How to size transistors of this circuit

I have attached circuit and I am gonna run simulation. Before running simulation, transistors should be correctly sized to get the output. I know how to size M5, M6 and M7 transistors in the figure, but the problem once having a voltage doubler (M1-M4 transistors). This voltage doubler affects...
5. ### Drain-source resistance (R_{DS(ON)}) of power MOSFET for Boost/Buck converter

How to calculate drain-source resistance of power MOSFETs for boost converter?
6. ### Why input voltage of boost converter is increasing exponentially

Here is the schematic. https://obrazki.elektroda.pl/8578529700_1487877167.png
7. ### Why input voltage of boost converter is increasing exponentially

https://obrazki.elektroda.pl/9969185600_1487876081.png top is the input voltage and bottom is the output voltage.
8. ### Why input voltage of boost converter is increasing exponentially

I design a boost converter which is good at operating with a fixed voltage source. However, once a voltage in series with resistor is used as a source. The input voltage of the converter is increasing. The converter has input capacitor which is ten times greater than the output one. It is...
9. ### plot 20GB tr0 hspice file

how to plot large size .tr0 output file?
10. ### Micro watt range boost converter design

Re: Calculate boost converter output power How to calculate the average output current?
11. ### Micro watt range boost converter design

Calculate boost converter output power When calculate boost converter output power, is it considered the output capacitor power? What kinds of equations can be used to determine the boost converter output power?
12. ### Micro watt range boost converter design

I want to design a boost converter which operates input 100mV and steps up to 1.5V with 0.13um cmos technology. Assume, I have 0.6 to 1V external voltage source to power up control circuit. What are the crucial stuffs in design should be considered and how to deal with them? Attached the circuit...
13. ### How to calculate power losses of a boost converter in an easy way.

I want to calculate each part power losses. Conductance and switching losses of power FETs can be calculated from previous post https://www.edaboard.com/threads/58898/. What are calculation methods for other losses?
14. ### How to calculate power losses of a boost converter in an easy way.

I know some power losses in a boost converter; conductance losses, switching losses, inductance losses and others. Is there any easy and quick way to calculate these losses from hspice simulation results? What are the most suitable equations for calculating these losses? Thnx.
15. ### Why boost converter inductor current and output capacitor current are different

Yes, load current is different from inductor current when PMOS3 is on. What kind of start circuit can be used? Should this start circuit permanently take place in the circuit or just for simulation?
16. ### Why boost converter inductor current and output capacitor current are different

attached circuit diagram. in previous figure, inx refers to NMOS gate voltage, l2 refers to inductor voltage. C2 refers to input voltage of boost converter.
17. ### Why boost converter inductor current and output capacitor current are different

I designed a boost converter in DCM with 90nm CMOS technology. My output should be 3.5V and input is connected to a capacitor through a switch. When cap reaches 1.8V, switch is on and the converter connects to the cap. Once the cap downs to 1V, switch is off. Simulations are carried out in...
18. ### Charging large capacitor(1F) in hspice/cadence

I have a charge pump whose output is connected large capacitor e.g. 1F, 2F with 4 stages, stage capacitor 250pF and supplying .6V. If it is like 10nF, it is easy to monitor charging of the charge pump by running simulation in hspice. However, large capacitance at the output takes long time...