Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Search results

  1. pigkiller

    help to use this RES model for spectre sim

    Hi, Erikl Thank you for getting the first reply here. You mean that I should bulid a parameterized cell based on this model? It seems a little more complicated than i expected. Sorry i forget to mention I don't have p-cell available from fab. So no process lib available. I wanna find an ez way...
  2. pigkiller

    help to use this RES model for spectre sim

    Hi, all I get a RES model file like this way, and I want to use this model for spectre sim. Since I'm a newbie in HSPICE area, I have the following questions. 1.which symbol I can use to call this model in analogLib? How to use it? 2.Should I need to change this RES model to 2-terminal model...
  3. pigkiller

    how to realize linearity tuning DCXO?

    Any good idea to realize linearity tuning DCXO? It means frequency is monotonicity when control bits from minimum to maximum. traditional switch capbank like we use in VCO is hard to achieve linearity tuning when using more tuning bits (12bits~14bits), bits from 011111111111 to 100000000000...
  4. pigkiller

    question about crystal load capacitor

    cl crystal capacitor and for my question, brothers? I just design a 26MHz xtal osc chips, shoulda use external xtal model, I just don't know the CL parameter in the quartz xtal manufacutre manual, it should be included in the xtal model for my simulation, or shoulda be inluded as my circuit...
  5. pigkiller

    question about crystal load capacitor

    crystal load capacitor then who can tell me the CL physics meaning? and my 1~3 which is correct?
  6. pigkiller

    question about crystal load capacitor

    32khz crystal capacitor I'm not clear about the meaning of the crystal load capacitor CL. As in the reference manual, the crystal has following parameters: Ls, Rs, Cs for the series resonance, Cp as intrinsic shunt capacitor, then what's the Load capacitor CL meaning? 1. As a crystal...
  7. pigkiller

    [QUE]fractional freq generation from 26MHz reference?

    swicap, fractional N pll can't gennerate stable fractional frequency, just frequency vary around the center of the fractional freq what i need. Ask gain, anybody help?
  8. pigkiller

    [HLP]tsmc undefined model error

    If we get nmos from analogLib and appoint its model from TSMC PDK , the simulation is good. But if we get nmos from TSMC PDK directly and also use PDK model, the simulation is error. The information is listed as the following. And the same file will be simulated well in other people's machine...
  9. pigkiller

    [QUE]fractional freq generation from 26MHz reference?

    How to generate a exactly fractional frequency from 26MHz reference? Such as generate a exactly 5.14MHz from 26MHz reference? urgently. regards.
  10. pigkiller

    divide by ODD number circuit with 50% duty cycle?

    I need to design a divide by 3 or 5 circuit with 50% duty cycle with input freq= 3GHz, any prototype and valuable material are welcome. Any suggestions?
  11. pigkiller

    ALL PASS FILTER & group delay

    since we can use all pass filter to compensate the group delay of the cascade stage of the low pass filter. I wonder if i can use higher order all pass filters to get better group delay? If we can, what's the defect of using higher order all pass filters?
  12. pigkiller

    help in ic5033 simulation

    pls tell me how to fix this problem, i have met the same problem..
  13. pigkiller

    [QUE]recommendation of hardware for cds5033

    i just want to mix Intel 64bit CPU & RHEL WS3 & SATA HD & CDS5033 together, if there are some problems, pls let me know as soon as possible.
  14. pigkiller

    [QUE]recommendation of hardware for cds5033

    i wonder if 64bit intel CPU could compatible with CDS5033?
  15. pigkiller

    [QUE]recommendation of hardware for cds5033

    I have learnt that Cadence don't support 64bit Intel x86 CPU and only IA-64. I wonder if anyone could give me a resonable configuration of My hardware plateform whether server or PC, or give me some valuable advice on it. thanks!
  16. pigkiller

    [QUE]recommendation of hardware for cds5033

    I wish to buy a computer in the near future mainly to run cds5033, and plan to install RH linux7.2 or FC3. I have some questions to ask: 1. I wish to use P4 processor, and wanna know if 64bit is supported. 2. SATA harddisk is supported? 3. more than 3G memory is supported? 4. videocard...
  17. pigkiller

    how to simulate PFD & charge pump noise?

    pfd noise For Behavior simulation of close loop Charge pump based PLL, PFD & charge pump noise parameter should be defined. And I don't know how to simulate single block PFD or charge pump noise by SpectreRF. Who have experience about that pls help me.
  18. pigkiller

    REQ advice and ref for Charge pump in CDR design

    REQ advice and ref for Charge pump in CDR design, what special should be pondered?
  19. pigkiller

    Which bias circuit can bring less phase noise to vco?

    vco bias circuit noise I wonder if VCO deisgn need any temprature compensation in the bias circuit? If so, to compensation what? voltage swing, phase noise? or just a power supply independent bias circuit is engough? or just a simple "res and a mos" current mirror is engough?
  20. pigkiller

    Which bias circuit can bring less phase noise to vco?

    vco bias circuit noise My case is in bipolar tech, so flicker noise due to mos is not concerned. as i know, bipolar as tail has more merit than mos, right? as i use wildlar PTAT to generate current, the largest noise contricution due to RES, which between the common mode point and bipolar, as...

Part and Inventory Search

Top