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    Programming StrataFlash on Spartan 3e Starter Kit

    Yes, you can program anything you want in your flash. You need an EDK project that has the the flash interface. Then in EDK you go to "Device Configuration" -> "Program Flash Memory". See this for details: https://www.xilinx.com/support/documentation/sw_manuals/xilinx11/est_rm.pdf. section...
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    Need help with NgdBuild:981 error

    The clk feedback info is already in your generated vhdl in the dcm instantiation. Is something like: generic map( CLK_FEEDBACK => "1X", You can safely ignore (delete) that constraint from your ucf
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    Trying to make LED to blink rapidly on Microblaze(C languag)

    Re: Trying to make LED to blink rapidly on Microblaze(C lang I didn't look through you code but I'll try to suggest you how to learn to do it. When you use the wizard to generate the platform you also get a test a application which tests your peripherals. One of them is the LEDs GPIO. Have a...
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    PIC18F instruction timing

    OK. Yes, the processor will spend some time to save and restore the context, that is registers that will be affected in interrupt. So you can't rely on instant interrupt servicing. That holds true for any processor in this world. Now that I understand better what you try to do I suggest to use...
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    PIC18F instruction timing

    Apparently you want a precise counter but you don't really want to let the timer to do it. So instead of keeping the counter value in a variable how about letting the timer run and look for it's value only? Or better, generate an interrupt when you need to do something (something more than just...
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    The USB LED Wand - displays floating image

    My project is basically a LED stick that can detect the hand motion and display a floating image. * 32 leds capable of displaying 32 vertical pixels * Three axis accelerometer * PIC24FJ64GB106 * HID USB device, no drivers necessary * HID USB bootloader, no drivers necessary...
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    puting hex file into VHDL written rom

    Re: rom hex file Search for ppx16 on opencores.org or the web. There is a hex2rom utility in this pack that may help you. There is also a project on sourceforge.net aiming to do this. BR
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    about LVDS - request for resources

    Re: about LVDS Here you go: https://www.national.com/appinfo/lvds/files/ownersmanual.pdf BR
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    VHDL/module get different simulation result as a component

    Re: VHDL/module get different simulation result as a compone Your stimulus are not exactly the same. When you simulate the stand alone component your stimulus which are probably synchronous with the clock are applied a little before the active edge of your clock (depending on your testbench...
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    Problem about Inverting signals inside FPGA.

    Check your channel 1 setting (on the scope). I believe you have coupling set to AC instead of DC.
  11. B

    How to implement checksum in VHDL?

    vhdl crc ethernet bit order Have a look at this thread here:
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    Create a custom board definition file (.xbd file) in EDK ?

    edk create custom board C:\EDK92\doc\usenglish\psf_rm.pdf (assuming you have EDK 9.2) Page 115 I highly recommend to use an existing xbd from one of the demo boards which is closer to your custom board as a starting point.
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    How to design a modbus protocol using vhdl?

    altera modbus Modbus can work over serial or Ethernet. If you need to implement MODBUS over a serial connection then all you need is a UART and a processor (NIOS is very good) If you need MODBUS-TCP then you need an Ethernet port instead of UART. The best resource is here...
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    How to design a modbus protocol using vhdl?

    vhdl modbus You can use whatever you want, including VHDL, NIOS or other combinations.
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    Integrating HDL modules and CoreGenerator parts using EDK

    how to import the coregen generated core to edk I think a "Create Custom Peripheral" in EDK will help you. You should also study the IPIF documentation.
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    EDK with Spartan 3E Starter Kit

    Then I can suggest two things: 1. Try to rebuild the project with VHDL option 2. Try to modify the dcm2 (the one that receives the ddr_fedback) like this: PARAMETER C_CLKOUT_PHASE_SHIFT = FIXED PARAMETER C_PHASE_SHIFT = 45 You can change those in the System Assembly GUI or add them in the MHS...
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    EDK with Spartan 3E Starter Kit

    spartan 3e starter kit memory test failed Did you see this? **broken link removed**
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    CRC32 implementation in ETHERNET : exact way

    crc32 c implementation ieee802.3 sorry but I don't know too much verilog. I used the CRC tool (the third link that I gave you) to generate a vhdl package. I used this in a project and works great. The online crc calculation tool also works OK for me. I use it all the time I need to double check...
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    CRC32 implementation in ETHERNET : exact way

    crc32 c code ethernet The FCS value is computed as a function of the contents of the source address, destination address, type/length and data (i.e., all fields except the preamble, SFD, FCS, and extension). Here you can find more info (page 16)...
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    How to program Xilinx 3ADSP1800 ?

    Re: Xilinx 3Adsp1800 you can build yourself the parallel cable 3 find the sch here **broken link removed** in page 74 (or B-2)

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