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    About curernt mirror, urgent, Help!

    Take a look at US patent #4532481 It's a bipolar circuit but it does what you need.
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    designing of ultralow power 16 bit sigma delta ADC

    A decimation filter uses a Cascaded-Integrator-Comb section followed by a FIR section. The CIC section decimates down to 4 times the output sampling frequency and has a response of the form (sin x over x)^n, n being higher than the order of the analog section. The FIR can be any linear phase...
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    bandgap voltage reference

    An amplifier having 2 high impedance nodes is not suitable for driving large capacitors. The circuit could be modified by reducing the high z nodes to one. Try removing R5, diode connect M6, remove the drain-gate short in M7. Add a Pchannel source follower (very large W/L) , gate connected to...
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    Channel length modulation question in CMOS

    In most applications L= n * Lmin with n=3-5 is adequate. For very large gain or matching n=10. Hspice output provides mosfet parameters for each device. Look for 'go' and may be 'gm' In most applications the required 'go' is related to some 'gm'. For matching, increasing n above 10 doesn't...
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    How to design an amp to sense weak current (1uA~2uA)?

    To sense current you need a current reference comparable to the current you want to measure. If > 1uA any current source can be used. < 1uA leakage complicates matters. You can amplify the current but you have to bias the sources of the mirror pair to reduce leakage. As a current to voltage...
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    How to simulate Crystal Oscillator in HSPICE?

    pss resonant frequency of oscillator It is possible to do a spice transient simulation of a crystal oscillator by setting options, time varying the Q using ideal switches, or using initial conditions, but simulation results will be useless unless simulation time is extended by several...
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    How to start designing a low jitter monolithic PLL in CMOS?

    pll design Low jitter can be 'cycle-to-cycle' needed for clock generators and 'rms' for local oscillators in comm systems. For clock generator a ring oscillator can be used as vco, using CML inverters to reduce sensitivity to power supply noise. Careful design of the PFD to reduce dead-time...
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    Using Tanner Tools for Analog IC design

    Ledit is Windows based and can be used for any analog/digital layout work proven DRC info is available for the process. ERC is not available (I am familiar with v8.22) but that should be ok in most cases. There is no provision for data base sharing or design/group management, then it is only...
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    High speed ADC Apeture time

    Aperture time refers to how long a time the sampling capacitor is exposed to the input signal. The actual voltage stored in the capacitor depends on the input voltage at the sampling instant (ideal) and on its derivativatives (cause of errors). The shorter the aperture time, the less the sampled...
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    MicroMagic CAD tools - where to find it?

    MicroMagic CAD tools According to some sources from Juniper Networks all CAD tools from MicroMagic (MAX layout and SUE schematic capture) were released into the public domain after the collapse of MicroMagic Inc. Does anybody knows where to find it ?????

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