Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Search results

  1. M

    PCi express help required

    Ok I understood.. thanks
  2. M

    PCi express help required

    Thanks for the reply yx.yang........ can you help to understand scenario given below, I have a Root complex connected directly with one End Point via PCIe link. Now, Root Complex BAR0 is programmed with 0x2000_0000, assume BAR range is of 64 KB that is 0x2000_0000 to 0x2000_FFFF Root Complex...
  3. M

    low power intent verification

    malav6789@gmail.com contact me I have some docs for cadence CPF file. you can start with it.
  4. M

    PCi express help required

    Can any one explain me what is the use of BARs in Root Complex device if my Root complex has only one port???

Part and Inventory Search

Top