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  1. B

    explain me the work of this buffer ckt please

    working of buffer can anyone plz explain me the workin of this buffer ckt....i.e how the transistors work as vin is varied?
  2. B

    freq and stability analysis

    why do we add an inductor and capacitor (LC ckt) in the feed back loop for freq and stability analysis for ex. as shown in this fig?
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    spectre - corner analysis

    corner analysis hello people, I am simulating different corners in cadence spectre. however the graphs for all the parameters come out as individual. Is ther any way by which all the parameter variations could be obtained in a single graph? The same problem exists while doing statistical...
  4. B

    adjusting the gain margin of a system

    the images of the buffer amplifier ckt and its freq response(gain and phase plots) are below....it is unstable right? wat modifications do i have to do for the circuit if i hav to make it stable? the load cap. can be >=3.5pF.
  5. B

    stability of a system from the frequency analysis

    transistor 1gmp how do you find out if the system is stable or not from the frequency analysis i.e. AC analysis(using cadence spectre)
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    evaluation of PSRR in cadence spectre

    How do u find the PSRR in cadence spectre through simulation? you have to give an AC signal at Vdde right?and after that how do you find the value of PSRR?
  7. B

    magnitude and phase plots in cadence spectre

    can anyone tell me how to plot the the magnitude and phase plots using ac analysis in cadence spectre and check if the circuit is stable or not:?:
  8. B

    bode plots in cadence spectre

    how do you plot the bode plots of 20log βH(ω) vs ω and phase of βH(ω) vs ω in cadence spectre using ac analysis? what should i take as the outputs to be plotted?when i simply give ac analysis with a frequency sweep it plots V,A the voltages or currents vs frequency...so how to do it for 20log βH(ω)?
  9. B

    how to increase the overdrive voltage

    overdrive voltage 0.1 I need high values of overdrive voltage, 0.1V<Vgs-Vth<0.15V, for the transistors so as to reduce the effect of mismatch..but for this ckt i am gettin very low values of Vgs-Vth for the nmos and the pmos transistors...increasing the bias current decreases the openloop gain...
  10. B

    finding the value of UnCox in cadence spectre

    how to get uncox can anyone tell me how to find the values of UnCox and the output resistance(ro) of the transistor(i.e. drain to source resistance):?: I am using a thin oxide transistor W=150nm and L=40nm
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    using variables in calculator (cadence spectre)

    calculator cadence i need to find the rise time in cadence spectre.....I have been using the calculator in wavescan to find it...now i have to test the circuit under different vdd conditions for which the expression for risetime also changes...is there any way by which i can use a variable as...
  12. B

    help me in finding the gain of the buffer amp.

    Gain of the buffer amp. Can anyone plz help me in finding the gain of this ckt ...this is a buffer amp.
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    how to download a free edition of cadence spectre

    cadence spectre does anyone know how to download a free edition of cadence spectre(45nm or 90nm), students edition or somethin
  14. B

    how to do transistor sizing in cadence spectre

    transistor sizing how to do transistor sizing in cadence spectre L= 40nm W=150nm no. f fingers=1 multiplier=1
  15. B

    determining the threshold value and UnCox of transistor

    cadence uncox I want to know how to plot and find out the values of threshold voltage and UnCox of a transistor in cadence spectra(nch_25_rpo_mac)
  16. B

    design of buffer amplifier

    buffer amplifier To design a unity gain cmos buffer amplifier(for 45nm technology): Band Gap Reference (BGR) Input: 1.2+_50 mV (+_ means plus or minus) Output: BGR+_10V Cload=3.5pF or higher Iload(current load) 50uA Vdd=3.3V+_300mV Idc<100uA PSRR>60dB FREQ:1MHz Temp:-45 to 125 degree C

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