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  1. J

    second order clock data recovery

    Hi experts, To deal with large frequency offset such as spread-spectrum, often CDR is engaged in second order. I'm wondering how second order makes frequency tracking range wider in general. I understand phase interpolation step size is also a factor of tracking range regardless of loop order...
  2. J

    CEI(common electric interface) -6G-LR receiver input jitter

    Hi As you might know, CEI-6G-LR standard does NOT specifically specify Rx input eye mask but it only defines 1200mVpp maximum. Maybe I'm missing something but how do you define CEI-6G-LR input eye mask for your design? Is there any jitter tolerance spec defined in it? Thx
  3. J

    ppm offset on clock data recovery

    Hi Pls give me some help to solve my confusion. In case a CDR has +/-2000ppm offset tracking ability, is this 2000ppm only on data or only on reference clock? I think certain ppm from one data rate is much smaller than same ppm from reference clock, assuming some multiplication in Rx PLL. For...
  4. J

    Clock data recovery w ext ref clock

    Hi all, I've been working on CDR basics study. CDR is supposed to b useful because clock can b embeded. In fact however, many SERDES rx uses external ref clock generated in tx. I think that ext clk incorporated with phase interpolation may help to deserialize less jittery manner relatively...
  5. J

    Best not-LC-type oscillator @20MHz

    Hi there, Apparently there are so many kinds of known oscillator structure that does not expect LC-tank. I'd like to ask you what fully on-chip oscillator topology you think best around a few tens of MHz in terms of jitter/power/area/psrr. RC oscillator? or n-stage ring oscillator? and Why...
  6. J

    ocean script - data print to file

    ocean script Hi, I am very new to SKILL or ocean script . I have problems with following script. Firstly I created this ocean.ocn by ADE>Session>Save ocean script... Then added some lines to output data to file. However it ends up outputing error after successful simulation but I do not know...
  7. J

    four stages ring vco phase noise

    ring vco Hi all, I've been trying to downsize the volume of VCO noise at 3GHz use. According to spectreRF (MMSIM7.0.1) pss+pnoise analysis for VCO only, higher Kvco gives same phase noise over entire offset. But I believe higher Kvco should bring worse phase margin since noise sensitivity...

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