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  1. R

    Negative capacitance and delay

    Interesting discussion, but this is still not clear to me. Let's say we have a REAL capacitor (Cr) in parallel with the -C as illustrated in the post #1, and Cr>|-C|. Then what's the delay? shouldn't be R*(Cr-C)? (remember we use the -C to cancel out (or neutralize) the real capacitance in...
  2. R

    inverter delay in Simulink

    Hi all, I want to add some delay to the inverter in Simulink, not integer cycle, for example, 0.3 Tcycle, or 0.2 Tcycle. It seems no way to do that in Simulink? any hint? Thanks, Ruri
  3. R

    How to setup to use Synopsys Hspice in Cadence Analog Artist

    as the subject, thank you.

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