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  1. S

    how to extract Cgs, Cgd by using ADE??

    Hi all. i want to extract Cgs, Cgd in CS amp by ADE simulation. The test bench and results table was attached. To verify simulation results i was simulation another method. By using AC simulation, i can extract capacitance of Gate. The result of AC simulation total gate cap is 93.76fF and...
  2. S

    What's the main source and effect of EMI?

    Hi~ guys. Recently i designed 1GHz PLL. But the PLL is have a big isuue. The designed PLL is generated EMI. Now i have a questions. What is the main soure of EMI? EMI is related with noise floor or noise figure? One of my friend said, by the EMI factor raise up noise level of the spectrum...
  3. S

    Noise calculation: uV^2 /Hz to dB

    hi~ rismriti. i think you want to calculate noise figure by using input referred noise voltage. noise figure(NF) is calculated this equation. NF=10log(1+(V^2/kTR)) (V=input referred noise voltage, k=boltzmann's constant, T=temperature in Kavin, R=50Ω)
  4. S

    I have a question about op amp. for band pass filter

    Hi nalog_prodigy My final destination is 40MHz band pass filter. To make a 40MHz band pass filter, first of all I design an 5GHz op amp. I know that bandwidth releated input Tr gm and gm is related with current consumption. Then, how do you design 5GHz amp maximum current 0.5mA. I think it is...
  5. S

    I have a question about op amp. for band pass filter

    I think, it is impossible~
  6. S

    I have a question about op amp. for band pass filter

    Hi, all~ I'm designing op amp for active RC band pass filter at 40MHz. I get a specification of op amp to do a filter modeling. The specification of op amp is like that : - unity gain freq. is more than 5GHz when load cap is 0.5pF - dc gain is needed 60dB - maximum power dissipation is...
  7. S

    Help me understand the feedback factor

    Hi.. all~ I don't understand the meaning of feedback factor in physically. Someone saids feedback factor is ratio of closed loop impedance and total loop impedance(closed loop impedance/total loop impedance). Why this fomular is induced?
  8. S

    I wanna martin solution

  9. S

    How do you decide on DC operating point?

    The basic question Thank you, A.Anand Srinivasan How can I find the DC point graphically? I don't understand your advice. Tell me more detail~
  10. S

    How do you decide on DC operating point?

    Hi,, all~ I have a basic question. How do you desice dc operating point? I have been decided operating point small overdrive voltage. Is it OK? And Vds is decied Vds=vdsat+0.1(or 0.2)V. Please tell me your method to decide dc operating point. Thanks~
  11. S

    characterizing operational amplifier

    dear analog_prodigy Do you know another method at the spectre?
  12. S

    Gain in the common mode feedback

    To abcyin I don't understand your expain. Please explain detail. And what's the difference your method and using "iprobe" method at the spectre simulation. Is the same method?
  13. S

    a simple circuit question

    In the fig.1 if gate voltage of p1 is inreased source voltage of p2 is decreas. So source voltage of p1 is increase. That is positive feedback. OK~?!
  14. S

    I wanna martin solution

    Hi, all~ I really want to get a martin's solution. Please~~
  15. S

    Increasing gain and bandwidth of 2 stage amp with CMFB circuit

    question of CMFB dear ljy4468 I measured phase margin at A0B=dB place. I have another question. If loop gain is much large, closed loop gain is changed?
  16. S

    Increasing gain and bandwidth of 2 stage amp with CMFB circuit

    Hi~ all~~ I desinged fully differential op amp. The structure of op amp is two stage amp with CMFB circuit. The specification is like that : Gain is more than 60dB, unit gain bandwidth is more than 100MHz and phase margin is more than 85degree. The simulation result is like that : loop...
  17. S

    How to decide output current in dac?

    Dear Btrend. I don't know the meaning of full scale spec. Please explain that the word in detail. ^^;;
  18. S

    How to decide output current in dac?

    thank you for your kindness. ^^
  19. S

    How can i test INL/DNL

    testing inl I don't want to simualte result. I want to test in chip. I used switchs in my board so I make 0..0~1..1 I think this way is not right. Please tell me another method to measure INL/DNL. Thank you.
  20. S

    How to decide output current in dac?

    The load Cap. is 5pF.

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