Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
i want to extract Cgs, Cgd in CS amp by ADE simulation.
The test bench and results table was attached.
To verify simulation results i was simulation another method.
By using AC simulation, i can extract capacitance of Gate.
The result of AC simulation total gate cap is 93.76fF and...
Recently i designed 1GHz PLL.
But the PLL is have a big isuue. The designed PLL is generated EMI.
Now i have a questions.
What is the main soure of EMI?
EMI is related with noise floor or noise figure?
One of my friend said, by the EMI factor raise up noise level of the spectrum...
i think you want to calculate noise figure by using input referred noise voltage. noise figure(NF) is calculated this equation.
(V=input referred noise voltage, k=boltzmann's constant, T=temperature in Kavin, R=50Ω)
My final destination is 40MHz band pass filter. To make a 40MHz band pass filter, first of all I design an 5GHz op amp. I know that bandwidth releated input Tr gm and gm is related with current consumption.
Then, how do you design 5GHz amp maximum current 0.5mA. I think it is...
I'm designing op amp for active RC band pass filter at 40MHz.
I get a specification of op amp to do a filter modeling. The specification of op amp is like that :
- unity gain freq. is more than 5GHz when load cap is 0.5pF
- dc gain is needed 60dB
- maximum power dissipation is...
I don't understand the meaning of feedback factor in physically.
Someone saids feedback factor is ratio of closed loop impedance and total loop impedance(closed loop impedance/total loop impedance).
Why this fomular is induced?
I have a basic question. How do you desice dc operating point?
I have been decided operating point small overdrive voltage. Is it OK? And Vds is decied Vds=vdsat+0.1(or 0.2)V.
Please tell me your method to decide dc operating point. Thanks~
I desinged fully differential op amp. The structure of op amp is two stage amp with CMFB circuit.
The specification is like that : Gain is more than 60dB, unit gain bandwidth is more than 100MHz and phase margin is more than 85degree.
The simulation result is like that : loop...
I don't want to simualte result. I want to test in chip. I used switchs in my board so I make 0..0~1..1 I think this way is not right. Please tell me another method to measure INL/DNL. Thank you.