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  1. T

    Sigma delta ADC small signal harmonic distortion problems

    ths for your reply. Because I think the -60dBFS input should give rise to noise in audio band not harmonic distortions. So the dynamic range spec, which is the absolute value of thd+n when -60dBFS is input plus 60dB, will be much better if no distortion exists in band. What interests and...
  2. T

    Sigma delta ADC small signal harmonic distortion problems

    A strange phenomenon appears when I was testing my sigma delta ADC(MASH 2-1 structure, with single bit quantizer at both stages) . The small signal (10mVpeak-peak, 2.9Vpeak-peak as FS value) 1kHz sine wave is used as stimulus to the data converter and 2nd, 3rd, 4th, 5th harmonic distortions can...
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    Audio sigma delta ADC help on spurious interference.

    THX, the link that you provided cannot be openned in my country for I'm in China whose goverment blocks Google for political reasons. But I've got your idea that you might think that the reason for the spurious components in audio band is due to limit cycle. However for high order SDM such as...
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    Audio sigma delta ADC help on spurious interference.

    Hi, I'm working on a project about audio sigma . There are some spurious components in audio band(20Hz~20KHz) when the ADC is stimulated with no signal or small amplitude signal such as 10mVpeak-to-peak 1kHz audio signal while no other analog or digital modules can generates that low frequency...
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    NMOS drain does not connect with VDD, PMOS drain does not connect with GND,why?

    Today I was told by a guy that I would better not connect the drain of NMOS with VDD directly in NMOS source follower and not connect the drain of PMOS with GND in PMOS source follower. That's obviously not mentioned in text books. Could someone tell me why? For ESD consideration?For Latch-up...
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    Potential use of MOS capacitor in constructing integrators

    Thanks, erikl. I've thought of using anti-parallel structure to ease the non-linearity problem but not so good. What I'm tring to do is maintaing the MOSCAP in strong inversion by controlling the cap's two terminals voltage. But the circuitry used to fulfill this job seems to be very comlicated...
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    Potential use of MOS capacitor in constructing integrators

    As is known to all, continuous integrators are widely used in analog modules, such as continous delta-sigma modulators, audio Class D amplifiters' PWM stages, triangular wave generators, etc. The capacitors needed in integrators are mostly MIM cap or PIP cap due to their excellent linearity for...
  8. T

    How to get multiple output voltages from LDO + BG noise (chopper stabilization)

    1. It's easy to attain multiple outputs LDO by splitting your feedback resistors rationally, and you will get .9V of divided voltage from 1.2V output. 2. If it's convenient, pls attach your BG schematic.
  9. T

    One problem in relationship between step transient response and frequency response

    In control theory, the relationship between step transient response and frequency response has been elaborated specifically, especially for 1st order and 2nd order systems. However, for linear, time-invariant, high-order systems having a dominant pair of complex congjugate closed loop poles...
  10. T

    MOS H-Bridge problem with glitch

    Usually, people intentionally introduce some dead time for push-pull output stage or H bridge. Why not have a try? I hope it's helpful.
  11. T

    a low voltage ZTAT current generator

    If possible, pls attatch the Bode Plot here
  12. T

    a low voltage ZTAT current generator

    Well, it's obvious that the RC form the Miller Compensation. So just follow Allen's hint given in the two-stage OPAMP design chapter in his famous book to calculate the exact values of the two passive devices(R is used as RHP zero-cancellation device). Note that in order to utilize Miller effect...
  13. T

    model file for floating gate MOSFEt

    If the foundry could provide this model for you, pls turn for help to the foundry. But it's not always possible to obtain this model because it's not widely used as normal MOSFET. When we were doing research on designing Floating Gate Memory Circuitry, we fail to obtain the model from SMIC...
  14. T

    a low voltage ZTAT current generator

    I've read this paper before but I cannot find it. Would you pls attach the pdf format file here? * You can cut the loop anywhere by inserting iProbe element from analogLib library and perform the stb analysis to see the phase margin, gain margin and GBW to test the stability of the negative...
  15. T

    a low voltage ZTAT current generator

    Buddy, I guess you drew the schematic uncorrectly, pls check it out by comparing exactly with fig 7.6-15 on page 425 from Allen's book first :) Your understanding is right. But you'd better explain from the current perspective using feedback. In Fig 7.6-15 on Alllen's book, you will see that...
  16. T

    how this result appear?

    The method for understanding what assumptions the author made is very simple from the mathematic point. You can expand both the numerators and denominators of the original expression and the result. Then compare the two expressions and see which terms are gone and which ones are reserved. By...
  17. T

    active input regulated cascode current mirror

    OK, first, check the left OPAMP's input terminal polarities. I guess you might connect uncorrectly or draw the schematic uncorrectly. Second, I guess the other two OPAMPs which are used to clamp the node N1 and N3 to Vref2 level might not be well designed. Try to make sure all of the devices in...
  18. T

    subthreshold op amp design?

    Pay attention to the two concepts. For stong inversion, you have tri. and sat. regions. For weak inversion(subthreshold), you also have tri. and sat. regions.
  19. T

    help needed,Stability analysis and noise analysis

    There are two ways to test the stability of the loop. One is that you can open your loop by inserting the testing elements, which are a very very large ideal cap, a very very large inductance and an AC small signal source, then perform AC analysis to see the AC maganitude and phase. You will get...
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    knowing of vt of nmos using virtuoso

    It's really easy to know the threshold voltage of the MOSFET using Cadence. Step1: Construct a correct circuit, whatever, maybe a inverter and perform the TRAN analysis. Step2: Results->Print->Transient Operating Pionts Step3: Click the MOSFET of which you want to know the threshold voltage in...

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