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delay line loop mismatch noise
A Low-Phase Noise, Anti-Harmonic Programmable DLL Frequency Multiplier With Period Error Compensation for Spur Reduction
Du, Q. Zhuang, J. Kwasniewski, T.
This paper appears in: Circuits and Systems II: Express Briefs, IEEE Transactions on [see also...
analog delay circuit
Low-jitter clock multiplication: a comparison between PLLs and DLLs
van de Beek, R.C.H. Klumperink, E.A.M. Vaucher, C.S. Nauta, B.
Univ. of Twente, Enchede, Netherlands
This paper appears in: Circuits and Systems II: Analog and Digital Signal Processing, IEEE...
Re: dcdc inductor freq
The higher the frequency the lower the inductance value as the inductor impedance is wL. As for the output capacitance it is used to reduce the ripple of the output voltage and it's value can be reduced by increasing the switching frequency.
A CMOS bandgap reference circuit with sub-1-V operation
Banba, H. Shiga, H. Umezawa, A. Miyaba, T. Tanzawa, T. Atsumi, S. Sakui, K.
Toshiba Corp., Yokohama, Japan;
This paper appears in: Solid-State Circuits, IEEE Journal of
Publication Date: May 1999
Volume: 34 , Issue: 5
To increase the range you should go to higher frequencies i.e UHF RFid; beacause
the operating zone of passive HF RFID systems (13.56MHz and also <135kHz) is in the “near field” of the reader transmission antenna, which results in achievable operating distances of approximately the diameter of...