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Type: Posts; User: circuitking
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Yesterday, 12:22
 Replies
 3
 Views
 125
Closed: How is the maximum inductor value in a technology process is determined
Hi I came to know that the maximum value that can be achieved in a technology process is restricted. Could someone eloberate on this. How would I know what is the maximum inductor value that can be...

Yesterday, 12:01
 Replies
 1
 Views
 123
Closed: How to plot Pout @1 dB compression point versus frequencies
Hi I want to plot 1 dB compression point versus frequenices. My goal is to plot Pout at 1 dB compression point Versus frequency. Is there any function in virtuoso calculator that picks the power @ 1...

12th August 2019, 20:17
 Replies
 5
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 263
Closed: Re: How to increase high frequency output power
For example in the below case
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12th August 2019, 13:58
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 5
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 263
Closed: How to increase high frequency output power
Hi, I need suggestions, in general, on how to increase high frequency output power. I was using inductive peaking but I don't get the flat response in the frequency range

7th August 2019, 08:18
 Replies
 8
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 708
Closed: Re: Stability of a circuit and its role in design steps
Actually I realized that to do Harmonic balance simulation the circuit should be stable but for this I need to extra component to make it stable. But how to do I find the exact Output power of a gain...

6th August 2019, 19:35
 Replies
 7
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 558
Closed: Re: How to reduce Harmonic Balance simulation time in Spectre
I realized that it is because my circuit is unstable at the frequencies where I am doing loadpull.

1st August 2019, 17:53
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 2
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 248
Closed: Distributed amplifier : What is the purpose extra line at the drain
Hi I was reading Broadband RF and Microwave amplifiers by Andrei Grebennikov, Narendra Kumar, Binboga S. Yarman and came across this figure.
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I know that the highlighted TL in blue is... 
29th July 2019, 12:09
 Replies
 7
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 487
Closed: Re: Effect of number of fingers and width of a transistor on Efficiency and power gai
Can you also say Effect of number of multipliers of a transistor on Efficiency and power gain

29th July 2019, 11:34
 Replies
 7
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 659
Closed: Re: Exporting Impedance data from Harmonic Balance after Loadpull analysis in cadence
I didn't write any script. I got that plot from "direct plot"

29th July 2019, 09:41
 Replies
 7
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 659
Closed: Re: Exporting Impedance data from Harmonic Balance after Loadpull analysis in cadence
I didn't exact answer to my question. In spectre, I performed loadpull by sweeping mag and angle in HB simulation. Now I want to save this data directly in terms of obtained impedances. Even If I...

27th July 2019, 15:50
 Replies
 8
 Views
 500
Closed: Re: Why the inductor equation is different in this paper
True. I should think and imagine more.
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[found at: slideplayer. com/ slide /4173361 /13 /images /8 /Constantk+section+for+Lowpass+filter+using+Tnetwork.jpg] 
27th July 2019, 11:31
 Replies
 7
 Views
 486
Closed: Re: How to measure the input reactance and output reactance of a MOSFET/gain stage
Yeah sure.
I used this
1.CinfromY=(1 / (abs(imag((1 / ypm('sp 1 1)))) * 6.28 * xval(ypm('sp 1 1))))
2.Cin=(abs(imag(zm(1 ?result "sp"))) / (2 * 3.14 * xval(zm(1 ?result "sp"))))
There is a... 
27th July 2019, 11:05
 Replies
 3
 Views
 258
Closed: Re: Is it possible to have same optimum load through out the frequency range
Small correction. Is it really possible for MOSFET and what exactly should I do to have the same optimum impedance over very wide bandwidths? Because loadpull would give different optimum impedances...

26th July 2019, 16:56
 Replies
 8
 Views
 500
Closed: Re: Why the inductor equation is different in this paper
So the correct equation for Lb in equation (2) is without /2

26th July 2019, 16:54
 Replies
 2
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 221
Closed: Re: How can the Reactive part of Zopt absorbed into the drain line in a DA
Is Copt value really in my hands? I am thinking that I would get it from loadpull.
   Updated   
I want the output capacitance of the gain stage be absorbed into the artificial... 
26th July 2019, 16:23
 Replies
 8
 Views
 500
Closed: Why the inductor equation is different in this paper
Hi I was reading the paper "A high Linearity Tapered Distributed Amplifier for Ultra Wideband Application" and I saw the equation for inductance of the artificial line has division by 2. As per...

26th July 2019, 15:08
 Replies
 9
 Views
 683
Closed: Re: Design pi/2 artificial transmission line using lumped elements
I don't believe if you say that you don't know something. You are genius. I can make lossless line using lumped elements. Connect Inductor in series and Capacitor in shunt and repeat the combination...

26th July 2019, 15:00
 Replies
 2
 Views
 221
Closed: How can the Reactive part of Zopt absorbed into the drain line in a DA
Hi, I was reading the paper "OPTIMUM DESIGN OF DISTRIBUTED POWERFET AMPLIFIERS. APPLICATION TO A 2  18 GHz MMIC MODULE EXHIBITING IMPROVED POWER PERFORMANCES " and came across this
The output... 
26th July 2019, 14:43
 Replies
 3
 Views
 258
Closed: Is it possible to have same optimum load through out the frequency range
Hi, I was reading the paper "OPTIMUM DESIGN OF DISTRIBUTED POWERFET AMPLIFIERS. APPLICATION TO A 2  18 GHz MMIC MODULE EXHIBITING IMPROVED POWER PERFORMANCES " and came across this
"As confirmed... 
26th July 2019, 14:39
 Replies
 9
 Views
 683
Closed: Design pi/2 artificial transmission line using lumped elements
Hi, I was reading the paper "Design Methodology for distributed Power Amplifier in Software Defined Radio Applications" and came across
"Once the characteristic impedances values are fixed, design... 
26th July 2019, 08:39
 Replies
 7
 Views
 486
Closed: How to measure the input reactance and output reactance of a MOSFET/gain stage
Hi, I found relative answers to the question but I want a little clarity.
https://www.edaboard.com/showthread.php?354373HowtomeasuretheinputcapacitanceandoutputcapacitanceofaMOSFET... 
23rd July 2019, 13:41
 Replies
 5
 Views
 447
Closed: Re: What's the difference between stacked and cascode configurations?
Nice Explanation.
I never connected C_CAS in any of my cascode topologies till now. In Conclusion for stack configuration, I should make sure C_ST is of the same order as C_GS. 
21st July 2019, 13:22
 Replies
 5
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 447
Closed: Re: What's the difference between stacked and cascode configurations?
What do you mean by gate grounded exactly?
Do you mean we can give input to the second gate also? But it doesn't show like that in the figure.
Can I also say cascode configuration is also a... 
20th July 2019, 21:48
 Replies
 5
 Views
 447
Closed: What's the difference between stacked and cascode configurations?
Hi This question already being answered here but I want some clarifications....

20th July 2019, 20:45
Thread: Why S22 curve is like this
by circuitking Replies
 6
 Views
 363
Closed: Re: Why S22 curve is like this
Yes it is, but If I have to keep degenerative inductor it needs to a huge value. I tried with small inductance values but still it is unstable.
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