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Type: Posts; User: pancho_hideboo

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1. Thread: Differential and common mode input resistance of the fully diffferential amplifier

by pancho_hideboo
Replies
21
Views
757

Closed: Re: Differential and common mode input resistance of the fully diffferential amplifie

Show me netlist regarding signal sources, loads, balun and analysis statements.
2. Thread: Why should LNA also care about IIP3?

by pancho_hideboo
Replies
3
Views
151

Yes........
3. Thread: What happens to output power and 3 BW in this circuit

by pancho_hideboo
Replies
1
Views
81

Closed: Re: What happens to output power and 3 BW in this circuit

Why do you set three ports.
Where is driving point ?

What do you expect ?
4. Thread: Why should LNA also care about IIP3?

by pancho_hideboo
Replies
3
Views
151

Closed: Re: Why should LNA also care about IIP3?

Assume three mobile phones, A, B and C.
Their Distances from base station are different.
Distance of A is small.
Distance of B and C is large.

Consider tx power control from base station.
TX...
5. Thread: Verilog-a code to latch analog voltages

by pancho_hideboo
Replies
7
Views
284

Closed: Re: Verilog-a code to latch analog voltages

This is not transparent latch.

For V(Clk2)=High, V(out)=V(in) ; Tranparent
Then V(in) is captured at negative edge of V(Clk2).
V(out) is constant during V(Clk2)=Low ; Hold Mode.
6. Thread: Problem in plotting I/O waveform in Cadence

by pancho_hideboo
Replies
15
Views
495

7. Thread: Problem in plotting I/O waveform in Cadence

by pancho_hideboo
Replies
15
Views
495

Closed: Re: Problem in plotting I/O waveform in Cadence

Can you understand netlist ?
Show me netlist.
8. Thread: DNL/INL Measurement in Cadence for DAC

by pancho_hideboo
Replies
2
Views
208

Closed: Re: DNL/INL Measurement in Cadence for DAC

This is a static DNL.

Evaluation of static DNL and INL does not require Histogram.

On the other hand, dynamic DNL requires Histogram.
9. Thread: INL/DNL Measurement from Cadence Spectre/Virtuoso Output

by pancho_hideboo
Replies
7
Views
416

Closed: Re: INL/DNL Measurement from Cadence Spectre/Virtuoso Output

First of all, you have to learn INL and DNL before EDA Tool Play.
That's all.
10. Thread: Verilog-a code to latch analog voltages

by pancho_hideboo
Replies
7
Views
284

Closed: Re: Verilog-a code to latch analog voltages

No.
You can not understand Verilog-A at all.

if V(clk2) >=0 aho = V(in);
@cross(V(clk2), -1) aho = V(in);
V(out) <+ aho;
11. Thread: Verilog-a code for differential amplifier

by pancho_hideboo
Replies
4
Views
190

Closed: Re: Verilog-a code for differential amplifier

Your code is not differential amplifier.

analog begin
vdiff = V(sigin_p) - V(sigin_n);
V(sigout_p) <+ vdiff * gain / 2 + vcom
V(sigout_n) <+ -vdiff * gain /2 + vcom
end
endmodule
12. Thread: Verilog-a code to latch analog voltages

by pancho_hideboo
Replies
7
Views
284

Closed: Re: Verilog-a code to latch analog voltages

Use @cross().
13. Thread: Problem in plotting I/O waveform in Cadence

by pancho_hideboo
Replies
15
Views
495

Closed: Re: Problem in plotting I/O waveform in Cadence

Can you undestand your circuits ?

DC Analysis is not useful.

You have to do Transient Analysis or Shooting-Newton-PSS Analysis.

Show me netlist.
14. Thread: In PA, if the bias is VDD then how can swing be 2*VDD with inductive load

by pancho_hideboo
Replies
2
Views
200

Closed: Re: In PA, if the bias is VDD then how can swing be 2*VDD with inductive load

Too easy.

Vout=Vdd - L*dI/dt

Surely learn very basic things before EDA Tool Play.
15. Thread: Problem in plotting I/O waveform in Cadence

by pancho_hideboo
Replies
15
Views
495

Closed: Re: Problem in plotting I/O waveform in Cadence

It is a design framework.
16. Thread: Verilog-a code for differential amplifier

by pancho_hideboo
Replies
4
Views
190

Closed: Re: Verilog-a code for differential amplifier

What switch do you use in switched capacitor circuit ?
Is it MOSFET or behavioral ideal switch ?
17. Thread: Problem in plotting I/O waveform in Cadence

by pancho_hideboo
Replies
15
Views
495

Closed: Re: Problem in plotting I/O waveform in Cadence

Cadence have many many tools.
No one knows what tool you use.
18. Thread: Differential and common mode input resistance of the fully diffferential amplifier

by pancho_hideboo
Replies
21
Views
757

Closed: Re: Differential and common mode input resistance of the fully diffferential amplifie

What do you want to mean by “same effect” ?

If you mean an equivalency as signal processing, RL=5kohm, CL=20pF.
19. Thread: Differential and common mode input resistance of the fully diffferential amplifier

by pancho_hideboo
Replies
21
Views
757

Closed: Re: Differential and common mode input resistance of the fully diffferential amplifie

Consider common mode for floating load case.
Load is infinity for common mode.
20. Thread: Differential and common mode input resistance of the fully diffferential amplifier

by pancho_hideboo
Replies
21
Views
757

Closed: Re: Differential and common mode input resistance of the fully diffferential amplifie

Load of method1 is floating load not differential
Load. There is no common mode load.

So method1 is not equivalent to both method2 and method3.
If you ignore common mode,
RL=5kohm, CL=20pF in...
21. Thread: Differential and common mode input resistance of the fully diffferential amplifier

by pancho_hideboo
Replies
21
Views
757

Closed: Re: Differential and common mode input resistance of the fully diffferential amplifie

I don't think so.
Method1 : Vo_diff = (Uo+-Uo-) + VCM
Method2 : Vo_diff = (Uo+-Uo-)

VCM is not required in method1. Surely consider direction of VCVS.

Connect (2*RL)//(CL/2) to d node of...
22. Thread: Differential and common mode input resistance of the fully diffferential amplifier

by pancho_hideboo
Replies
21
Views
757

Closed: Re: Differential and common mode input resistance of the fully diffferential amplifie

Testbench using VCVS does not drive output of amplifier differentially.
It does drive output of amplifier as floating.

On the other hand, testbench using balun does drive output of amplifier...
23. Thread: Differential and common mode input resistance of the fully diffferential amplifier

by pancho_hideboo
Replies
21
Views
757

Closed: Re: Differential and common mode input resistance of the fully diffferential amplifie

No, they are completely different.

Testbench using balun is correct.
However testbench using VCVS is wrong.

Of course, you are wrong.

Can you understand VCVS ?
It is unidirectional.
You...
24. Thread: Interpretation of AoD(Angle of Departure)

by pancho_hideboo
Replies
0
Views
269

Closed: Interpretation of AoD(Angle of Departure)

https://www.bluetooth.com/blog/new-aoa-aod-bluetooth-capabilities/

I can understand AoA(Angle of Arrival) as Spatial Spectrum Estimation.
However I can not explain AoD(Angle of Departure) well.
...
25. Thread: Problem in plotting I/O waveform in Cadence

by pancho_hideboo
Replies
15
Views
495

Closed: Re: Problem in plotting I/O waveform in Cadence

What do you mean by “in Cadence” ?
Do you visit Cadence office and are you there now ?