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Type: Posts; User: Junus2012

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  1. Closed: Maximum output voltage of operation amplifier with maximum load current

    Dear friends,

    In all of the op-amp design procedure given by any text, the maximum output voltage is designed and defined as the output range where the output transistor are at the boundary of...
  2. Closed: Re: Simulating the input capacitance of digital instance

    Thank you Pancho for your reply,

    I think logically for digital circuit running with clock, then "Average Cin" should be extracted to be considered as equivalent input capacitance, So yes I am...
  3. Closed: Re: Simulating the input capacitance of digital instance

    Dear Pancho,

    Yes I am using the Spectre,

    I don't want to simulate the capacitance for a specific time, rather than simply the input capacitance
  4. Closed: Re: Problem in saving data during DC sweep simulation in Cadence Virtuoso

    Dear Pancho,
    Thank you very much for your nice links,

    referring to your statment ''Or enclose ac analysis statement by sweep statement in netlist'', how to implement it? I am not familiar with...
  5. Closed: Re: Simulating the input capacitance of digital instance

    Dear friends,

    Thank you for your reply,

    after looking to the discussion between simulating the input capacitance from ac or transient I saw that people went in favour of ac one as also...
  6. Closed: Re: Output short circuit current of operational amplifier

    Dear Freebird

    kindly see below the short cicrcuit current test for my fully differential amplifier, the maximum current at the output is about 28 mA.

    I have shorted the putput load and swet...
  7. Closed: Re: Output short circuit current of operational amplifier

    Dear Friends,

    I read some usefull application of knowing Isc, for example in case of driving high CL, some of the solution is connect small Rs inseries, with the help of the Isc then we can...
  8. Closed: Output short circuit current of operational amplifier

    Hello,

    Op-amp manufaurers specify the value of output short circuit current (Isc). In a proper design no one would connect a short to the output, what is the purpose of this value ?

    Can you...
  9. Closed: Converting single ended amplifier to fully differential amplifier

    Dear friends,

    Suppose I have desinged a simple single-ended two-stage miller op-amp (seen in the image below)to drive Capacitive load CL and resistive load RL with certain GBW, Gain and Slew...
  10. Closed: Re: Problem in saving data during DC sweep simulation in Cadence Virtuoso

    Dear friends,

    I recieved an answer from Cadence,

    there are two solutions:

    1. Simulation using ADE Explorer to set up the surrounding sweep, then spectre would (normally) run with similar...
  11. Closed: Simulating the input capacitance of digital instance

    Hello,

    I need to simulate the input capacitor of a CMOS gates. Particularly now I am interested to see the input capacitance at the clk input of the D-flip flop. Knowing this value will help me to...
  12. Closed: Re: Problem in saving data during DC sweep simulation in Cadence Virtuoso

    Dear Pancho,

    The parametric has no problem, it is well working, but I am asking why the simulation fail to present data in grpah if I do the sweep from DC ?

    - - - Updated - - -

    See the image...
  13. Closed: Re: Problem in saving data during DC sweep simulation in Cadence Virtuoso

    Dear Suta,
    my supervisor suggested me not to include transient analyses to sweep the VIC, because transient simulation first it takes time and second it shows time behavoural of the circuit which...
  14. Closed: Problem in saving data during DC sweep simulation in Cadence Virtuoso

    Dear friends,

    I am trying to plot the GBW of my amplifiier under the whole range of the input common mode voltage (VIC). Therefore I run both the DC and AC analyses in the same time, I sweep the...
  15. Closed: Re: Transistor region of operation in operational amplifier

    Thank you for your answer Suta, I tried your method and it is working. I can confirm from your graph ans mine that weak inversion starts usually at VGS-vth=Vov in negative,, so the concept of Vov=...
  16. Closed: Re: Transistor region of operation in operational amplifier

    Dear Suta,

    Thank you very much for your reply

    you are right, I also found this slide from Allen, the region where gm saturated is the weak inversion region,

    155952

    in my gm/ID result...
  17. Closed: Re: Transistor region of operation in operational amplifier

    Dear Suta,

    I am very sincerely grateful to your help, always you have perfect solutions..

    Your trick is magically works,

    below you see the results


    155943
  18. Closed: Re: Transistor region of operation in operational amplifier

    Dear Suta,

    Thank you for your nice reply

    Can you please explain me how to creat saveop.scs file ?

    Thank you once again for your help
  19. Closed: Re: Transistor region of operation in operational amplifier

    Indeed Suta I have tried to plot gm/ID but the claculator was giving me multiple graphs rather than one, this due to that I swept the VGS from the parametric analyses not by DC simulation setup,
    ...
  20. Closed: Re: Transistor region of operation in operational amplifier

    Dear Suta,

    I did this simulation for one NMOS transistor, it has the following parameter from normal circuit run
    W/L = 40 um/1m
    VDS= 153.8 mV
    VGS= 610.3 mV

    In cadence I could verify it is...
  21. [SOLVED]Closed: Re: Common mode gain simulation for differential amplifier using balun

    Dear Erikl,

    Thank you for your reply

    I think I did two mistakes, first in my plot, the output balun should be Bo and the the input balun is B1.

    The second mistake is about the difinition of...
  22. Closed: Re: Transistor region of operation in operational amplifier

    Dear Suta, Thank you for reply

    I think you are suggesting me to use the gm/Id methodlogy, Right ?... for me I am desinging with 0.35 µm technology and therefore I am following the traditional...
  23. Closed: Re: Transistor region of operation in operational amplifier

    Dear Suta,

    Thank you very much for your nice explanation,

    The method you propose it is interesting, I will keep it in mind to do.... nevertheless Cadence provide an operating region like region...
  24. Closed: Re: Input referred noise simulation for OP-amp

    Desr friends,

    Thank you for your reply

    I think in the picture from Allen slides he missed to put the ac source on the plus_input.

    Dear Fvm, For sure working with high gain open loop is not...
  25. Closed: Input referred noise simulation for OP-amp

    Dear friends,

    When I want to simulate the input referred noise of the op-amp, should I perform the test under open loop condition or under closed loop condition with unity gain buffer for example...
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