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Type: Posts; User: circuitking

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  1. Closed: How to find cutoff frequency of the circuits

    Hi, I want to find cutoff frequency of the two attached circuits. I just want to know is there any quicker way to find it. For the circuit2 I got it as 1/(2*pi*R*C) but I don't see the same in...
  2. Closed: When to connect RF Bypass capacitor, and a Resistor in place of RF choke?

    H, RF choke (Inductor) is used to isolate AC signal and DC like wise DC blokcing capacitor is also used for the same purpose.

    156021 *figures taken from Internet.

    1.As shown in figure (1), when...
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    Closed: how to get higher P1dB,in point

    Hi, for example a circuit has P1dB,in at -10 dBm. What all possibility/techniques do I have to change it to 10 dBm. Thanks.
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    Closed: Re: Loadpull for Differential PA

    How are you saying that output is shorted, is it because the C terminal of Ideal_balun connected to ground?. Also, I already connected 'dcblock' and 'dcfeed', where else should they be connected?
    ...
  5. Closed: How the stability analysis in analog and RF design related?

    Hi, we measure stability of a circuit in terms of phase margin and gain margin in analog circuits where as for RF circuit analysis kfactor >1 and delta <1. In some way, is there any relation between...
  6. Closed: Re: S parameter extraction for MOSFET internal parameters

    This is really a good tip.
  7. Closed: Re: what is the significance of the transit frequency and maximum frequency of oscill

    In the case of DA the maximum gain-BW product is 0.8*fmax.
    Source-[MESFET Distributed Amplifier Design Guidelines]
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    Closed: Re: Why S22 curve is like this

    I know that bias is not shown. If at all bias is connected, where should it be connected?.

    Anyway, I found out where It should be connected without disturbing biasing.
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    Closed: Re: Why S22 curve is like this

    I have seen in a book, a capactior is also used. I am still wondering how bias is provided when capacitor is kept in the signal path as shown in the figure.

    155792
  10. Closed: Re: Parasitic capacitor extraction: huge value

    Well, I think I found an answer for my question. https://www.edaboard.com/showthread.php?319853-Spectre-calculator-How-to-calculate-input-capacitance-of-a-2-ports-network
  11. Closed: Re: What happens to output power and 3 BW in this circuit

    The ports connected to the capacitors providing input power of 10 dBm each (loaded LC ladder section). I kept ports to find the ZP and SP at those points. I expect to see more output power at the...
  12. Closed: Re: S parameter extraction for MOSFET internal parameters

    Actually this is the book name "Distributed Power Amplifiers for RF and Microwave Communications Narendra KumarAndrei Grebennikov" and those equations are given from MESFET or HEMT. They look similar...
  13. Closed: Re: S parameter extraction for MOSFET internal parameters

    I am not sure, where/how do I verify which model it is?
  14. Closed: Re: How do you choose input power while doing loadpull?

    After reading this post https://www.edaboard.com/showthread.php?386008-Power-Amplifier-Design, it makes me think.
    What is the pout that is shown at optimum load , Is it p1dB(out) or maximum power...
  15. Closed: S parameter extraction for MOSFET internal parameters

    Hi, In this book Radio Frequency Integrated Circuit Design Second Edition John W. M. Rogers Calvin Plett author mentions equation for MOSFET internal capacitors, resistors and gm. How accurate are...
  16. Closed: Re: Parasitic capacitor extraction: huge value

    Hi Sutapanaki, could you explain how do we simulate for Cgs and Cgd?

    There is so much confusion around for me.
    1. I can use tran simuation and find the time domain signal and verify the...
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    Closed: Loadpull for Differential PA

    There are few posts on this but I just clarify it properly for my problem.

    https://www.edaboard.com/showthread.php?363089-Load-Pull-for-Differential-PA&highlight=ideal+balun...
  18. Closed: Identical gain stages in Distributed amplifier:are they paralllel or cascaded?

    Hi, The identical gain stages in DA, if I have 5 of them, can I say that it is a 5 stage DA? but we use " stage" notation only to cascade connections, in which the output of one stage is given to...
  19. Closed: Frequency as a variable in an instance

    Hi,I want to define an instance in virtuoso, say PORT, whose real and imaginary part change with frequency and see its behavior on smith chart using sp simulation. Re(z)=f(freq) and imag(z)==f(freq)....
  20. Closed: Re: In distributed amplifiers, is it total input capacitance of the gain stage or Cgs

    If the line is modeled with a discrete set of inductors and capacitors, then it is referred to as an artificial transmission line.

    Please refer Radio Frequency Integrated Circuit Design, Second...
  21. Closed: What happens to output power and 3 BW in this circuit

    Hi, I calcaulated L and C values for a butterworth filter, to get 3 dB BW of 50 GHz and attenuation of 6 dB at 60 GHz. Next, I gave 10 dBm input power and I got the expected result.
    Again I took...
  22. Closed: Re: How to calculate bandwidth for this circuit, including lower and higher cut off f

    True, I didn't connect gate capacitors. Then how do we call this structure, cascode or stack? So if I dont connect those gate capacitors what changes would be there in performance parameters?
  23. Closed: How to calculate bandwidth for this circuit, including lower and higher cut off freq

    Hi, for the attached stack structures I already added the capacitors after doing simplifications. I was thinking I should multiply the capacitance with the resistances I marked.
    1. Is it correct,...
  24. Closed: In PA, if the bias is VDD then how can swing be 2*VDD with inductive load

    Hi, From the below link I read that when we have inductive load, for example, in CS amplifier the output voltage swing can be (2*VDD), if VDD is the supply voltage
    ...
  25. Closed: Re: What is the difference between BVDSS and BVDS

    Thanks. How is substrate breakdown voltage is denoted, any short form? I am looking for its value in the PDK but I find it nowhere.
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