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Type: Posts; User: sutapanaki

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  1. Replies
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    Closed: Re: Two Qs re: resistance

    If the two resistors have one terminal in common, then it is series connection and current will reduce if the voltage across the series connection stays the same as it was when only one resistor was...
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    Closed: Re: Designing of high GBW opamp

    You have an OTA with a feedback. The GBW is the frequency where the loop gain crosses 0dB. The same GBW frequency is the -3dB frequency of the closed loop amplifier (assuming a 1st order loop gain...
  3. Closed: Re: Gain bandwidth issue of fully differential amplifier

    Oh, that's a problem. I can't provide a source since I just wrote it on a piece of paper and sent it to you. After all it is just common-sense circuit analysis.
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    Closed: Re: Designing of high GBW opamp

    Wow, you have a sampling frequency of 5MHz, which means you have to settle within 50ns while tracking the signal (say Ts/4 for slewing and another Ts/4 for linear settling, Ts is sampling clock...
  5. Closed: Re: Gain bandwidth issue of fully differential amplifier

    The GBW does not depend on the CMFB but if the CMFB is not working correctly it can change the operating point of the circuit and thus the GBW and other parameters.

    Here is an example single ended...
  6. Closed: Re: Gain bandwidth issue of fully differential amplifier

    OK, let's get into some details, then. Is your OTA 1 stage or two stage? If it is 2 stages, then your BW is really determined by the miller cap, not the load cap. Load cap only affects the 2nd pole....
  7. Closed: Re: Gain bandwidth issue of fully differential amplifier

    This is hardly a mystery. Since you say you've kept everything the same as in the single-ended case, that means you have the same single ended voltages with respect to ground at the outputs but with...
  8. [SOLVED]Closed: Re: OTA 2 stage (folded cascode + common source)

    It is not really a folded cascode amplifier, the way you've drawn the circuit. The transistors at the drains of M3, M4, should be PMOS, not NMOS. With NMOS, there is nothing that controls the...
  9. Closed: Re: Step response of fully differential amplifieer

    It can not set the DC op the way the circuit is drawn. If it is in a switched-capacitor context, the circuit usually works in at least two clock phases with switches involved. The first one usually...
  10. Closed: Re: Step response of fully differential amplifieer

    This is probably just a model of a switched capacitor circuit. The circuit given as is makes little sense since there is nothing to set the dc bias conditions for the inputs of the OTA.
  11. Closed: Re: Charge Pump with unity gain amplifier (Bootstrapping Charge Pump)

    Yes, there is charge sharing and that's the problem.
    Imagine a hypothetical situation where we have the charge pump with its output capacitor and the VCO only. Let's say the charge pump output cap...
  12. Closed: Re: Charge Pump with unity gain amplifier (Bootstrapping Charge Pump)

    Yes, that's right. There are two conditions for a MOS transistor to be in saturation:
    1) to have some Vgs-Vth
    2) to have enough Vds.
    Here, when M6 is off, the second condition is not valid. It is...
  13. Closed: Re: Fully-Differential folded cascode amplifier with enhanced gain

    Exactly right. That's why in my previous comment I said that "The replica is there to just make sure the operating conditions for M5a and M3a are good with the cascode bias of M5a." Or if you want to...
  14. Closed: Re: Charge Pump with unity gain amplifier (Bootstrapping Charge Pump)

    Well, you have M0 driving the gate of M2, but the path for the drain current is cut off by turning off M6 (assuming no opamp and no M4/5). That can only result of M2 Vds=0.
  15. Closed: Re: Charge Pump with unity gain amplifier (Bootstrapping Charge Pump)

    The opamp doesn't really help with having higher impedance of the current sources. The impedance is what it is coming from the gds of the transistors M2/M3. What it helps with is keeping the current...
  16. Closed: Re: Fully-Differential folded cascode amplifier with enhanced gain

    It sounds about right. If you are still working with 0.35um technology, the gate of the NMOS cascodes will be at something like 2*0.2+0.6=1V and for a supply of 3.3V that will be better handled by a...
  17. Closed: Re: Class AB fully differential amplifier design issue

    From what I see M7/M12 are just providing level shift. M6 and M5 are most probably same or ratioed. If Vds of M6 (defined by one Vgs above gnd) is bigger than Vds of M5 (defined by the output CM...
  18. Closed: Re: Fully-Differential folded cascode amplifier with enhanced gain

    Yes. Try it and let me know what you get.
  19. Closed: Re: Fully-Differential folded cascode amplifier with enhanced gain

    I see this time it worked. So, just a clarification. The replica is there to just make sure the operating conditions for M5a and M3a are good with the cascode bias of M5a. Then, for the common-mode...
  20. Closed: Re: Fully-Differential folded cascode amplifier with enhanced gain

    Somehow, the picture didn't show. Let's try again.

    156438
  21. Closed: Re: Fully-Differential folded cascode amplifier with enhanced gain

    You need to create a voltage reference for your CMFB circuit for the aux amps that puts the main amplifier cascodes in the right operating conditions. An idea could be with a replica circuit like in ...
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    Closed: Re: DAC unit cap selection for SAR ADC

    Using the kT/C noise to calculate the unit cap is a reasonable approach. MOM caps usually used in the design of the cap dac for SARs match pretty well, maybe up to 10 bit accuracy and they keep their...
  23. Closed: Re: Fully-Differential folded cascode amplifier with enhanced gain

    You should not try to somehow fudge the common-mode voltage of the aux amplifier. Best is to create a replica circuit from similar transistors as M3 and M5, with a current that's also similar (DC...
  24. Closed: Re: Dynamic Comparator Input Referred noise

    How do you calculate the noise of that comparator?
  25. Closed: Re: Problem in saving data during DC sweep simulation in Cadence Virtuoso

    It is true that transient may exercise time behavior of the circuit but this is in case if you change you VIC too fast. If the change is slow enough, then it is pretty much like DC.
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