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Type: Forum Threads; User: ecasha

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  1. Closed: duty cycle calculation

    Started by ecasha, 15th September 2017 14:59
    • Replies: 6
    • Views: 1,091
    Last Post: 15th September 2017 17:12
    by KlausST  Go to last post
  2. Closed: WARNING: NgdBuild:486 in Xilinx

    Started by ecasha, 13th June 2017 04:25
    • Replies: 1
    • Views: 1,082
    Last Post: 13th June 2017 08:46
    by dpaul  Go to last post
  3. [SOLVED]Closed: verilog code for addition of contents in the memory

    Started by ecasha, 17th May 2017 18:35
    • Replies: 8
    • Views: 1,586
    Last Post: 19th May 2017 06:46
    by vGoodtimes  Go to last post
  4. Closed: [moved] MATLAB,Xilinx ISE inteface

    Started by ecasha, 1st May 2017 09:54
    • Replies: 0
    • Views: 563
    Last Post: 1st May 2017 09:54
    by ecasha  Go to last post
  5. Closed: MATLAB, MATLAB simulink, or Xilinx; which is the best one?

    Started by ecasha, 20th April 2017 09:20
    • Replies: 1
    • Views: 1,179
    Last Post: 20th April 2017 09:42
    by dpaul  Go to last post
  6. Closed: storing values in array

    Started by ecasha, 17th April 2017 18:28
    • Replies: 4
    • Views: 925
    Last Post: 18th April 2017 07:53
    by ads-ee  Go to last post
  7. [SOLVED]Closed: [moved] synthesis error RTL schematic

    Started by ecasha, 10th April 2017 15:11
    • Replies: 3
    • Views: 852
    Last Post: 10th April 2017 16:02
    by dpaul  Go to last post
    • Replies: 13
    • Views: 1,289
    Last Post: 3rd April 2017 11:31
    by hcu  Go to last post
    • Replies: 2
    • Views: 1,049
    Last Post: 27th March 2017 18:20
    by ThisIsNotSam  Go to last post
  8. Closed: fault detection in combinational and sequential circuits

    Started by ecasha, 20th March 2017 04:35
    • Replies: 1
    • Views: 820
    Last Post: 20th March 2017 10:35
    by dpaul  Go to last post
  9. Closed: module instantiation

    Started by ecasha, 8th March 2017 07:05
    • Replies: 4
    • Views: 706
    Last Post: 8th March 2017 17:49
    by ads-ee  Go to last post
  10. Closed: s27 Benchmark circuit

    Started by ecasha, 7th March 2017 15:12
    • Replies: 1
    • Views: 1,488
    Last Post: 7th March 2017 16:06
    by ThisIsNotSam  Go to last post
  11. Closed: verilog code for serial in parallel out shift register

    Started by ecasha, 2nd March 2017 10:46
    • Replies: 3
    • Views: 6,881
    Last Post: 2nd March 2017 17:28
    by ads-ee  Go to last post
  12. Closed: [moved]vhdl or verilog code to call a function within loop

    Started by ecasha, 1st March 2017 17:46
    • Replies: 2
    • Views: 860
    Last Post: 2nd March 2017 17:09
    by ads-ee  Go to last post
  13. Closed: convolutional encoder

    Started by ecasha, 28th February 2017 15:28
    • Replies: 0
    • Views: 481
    Last Post: 28th February 2017 15:28
    by ecasha  Go to last post
  14. Closed: radix-10 multiplication

    Started by ecasha, 28th February 2017 07:13
    • Replies: 3
    • Views: 756
    Last Post: 28th February 2017 11:36
    by KlausST  Go to last post
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