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Type: Posts; User: nitishn5

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  1. Closed: Re: Learning to write code for circuit design, where to start?

    A Netlist is just a description of the circuit in text form. It only contains the devices and the net names their terminals are connected to. And the definitions of the device are usually defined in...
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    Closed: Re: TI TINA simulation with AD8603

    From what I have heard from application engineers, they will only model the main features of the device in its spice model.
    In the datasheet of the opamp you chose, the main features are low noise,...
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    Closed: Re: current mirror matching issue

    Actually there is a simple solution for this.

    Assume Mbias W/L = 3/5 (Long Length for matching)
    Assume Mcascode W/L = 1/1 (Some Min Length)

    Use the unit W = 1

    And place the devices...
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    Closed: Re: current mirror matching issue

    Is the reason you want to keep them side by side rather than above-below, because the area you have longer horizontally than vertically?
  5. Closed: Re: decoupling capacitors in integrated circuit design

    Unless your chip is very small, you would have some routing resistance from your supply pin/pad to your circuit block. And this can lead to cross talk when there are multiple blocks on the same...
  6. Closed: Re: Probing with oscilloscope causes current drop

    As mentioned by others, the oscilloscope probe is loading your signal.

    I would suggest either using a high impedance probe and perhaps a high frequency probe that has low capacitance.
    But they...
  7. Closed: Re: PSRR Considerations for high speed applications

    One reason I feel most of the circuits limit themselves to a 10MHz bandwidths is because that is easier. In order to get a good PSRR at higher frequencies one would need to burn either Power (use...
  8. Closed: Re: About ICs with high potential differences within ...

    Hi,

    IC Fabs and Foundries use special methods to get these high voltage devices. They can have different source/drain structures, different doping concentrations, different oxide thickness or even...
  9. [SOLVED]Closed: Re: How to simulate a circuit with feedback with a test voltage after making a breakp

    Hi,

    Could you elaborate on the Cadence STB analysis or point me to some resources on the same. I would like to read more on this. Thanks...
  10. [SOLVED]Closed: Re: How to simulate a circuit with feedback with a test voltage after making a breakp

    In order to ensure that the normal DC operating point does not change, using the node voltages from a previous DC op simulation might not be enough. For example, of your loop gain is 1000 and you set...
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    Closed: Re: Questions about cascode

    The drain of M1 is being set by the amplifier loop (M3, (M4), M2).
    That will set it to Vgs,M3 = Vt + Vsat,M3.

    M1 cannot do much to set its own Vds as it is in open loop.
  12. Closed: Re: CMOS current reference with beta multiplier and inverse widlar current source

    When you get a temperature coefficient of 650ppm/degC, is this across PVT corners or only at a particular Process and Voltage?

    Some Schematics/design details would be of help.
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    Closed: Re: Questions about cascode

    From my understanding it should be Vt + 2*Vsat.

    M3 Gate (or M2 Source) would be at Vt + Vsat,M3.
    For M2 to be in saturation, minimum voltage at drain would be M2,Source + Vsat, giving us the...
  14. Closed: Re: How to let current source has linear V-I and can supply enough current?

    Can you use a Typical V to I Converter? That uses an OpAmp?
    Provided the loop gain is high, you will get excellent linearity.
    147232

    You can use PMOS as well. And even have it Supply Referred....
  15. Closed: Re: Ask about the "official name" of a circuit connection in folded-cascode op-amp

    Yes, the circuit is effectively just a folded cascode using a wide swing cascoded current mirror.
  16. Closed: Re: Ask about the "official name" of a circuit connection in folded-cascode op-amp

    "Wide Swing Folded Cascode" ...?!
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    Closed: NMOS input OPAMP with no inputs

    What are the methods used to prevent an Op-Amp from Overshooting during its initial powerup when the input signals are not present?

    Lets say that there is an NMOS input Op-Amp. Initially, when...
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    Closed: Re: Bandgap MOS Mismatch (MonteCarlo)

    Make sure that the current mirrors have adequate Vgs-Vth and Vds-Vdsat margins.
    Say about 100mV or so. That will help a lot with mismatch.


    Chopping can help you get rid of the Op-Amp offset.
  19. Closed: Re: what happens to the phase shift of a 2-stage opamp?

    This sort of behaviour shows up in Loop Gain analysis of different kinds.

    On can even see similar plots from tools like MatLAB as well.

    I think it is a result of how the tool handles multiple...
  20. Closed: Re: Little help with circuit analysis of amplifier

    Hi gonsays,

    If you want to find out the transistor dimensions, you would have to use the MOS Current equation.
    For that you would need the process parameters like Kn, Kp, Cox etc.
    For that you...
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    Closed: Re: tranconductance amplifier

    It might not be the resistor divider that is affecting you but the parasitic capacitances associated with the large resistors that might be affecting it.

    Maybe you could run some simple frequency...
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    Closed: Re: Low Dropout Regulator Design

    What Load are you designing the LDO for? The LDO should be designed for the Maximum expected load.

    You would also be having some transient requirements as well. The loop bandwidth must be big...
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    Closed: Re: In which case vdd shielding

    If you have a supply referred node. it would be useful to have shielding using VDD lines. This would improve PSRR.

    For example, a PMOS gate bias for a current mirror. It is a supply referred node....
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    Closed: re: Low Dropout Regulator Design

    It seems that your power transistor is not sized properly.

    Are you sure it can handle the load that you have put? Because if it is sized too small, it would require a very large Vgs to provide...
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    Closed: re: Low Dropout Regulator Design

    What is the ICMR or you Op-amp?
    What is the Output Voltage that you are targeting?
    Do the two match?

    You should have designed the entire LDO together and not in parts (Error Amplifier and then...
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