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    Closed: Re: Step Down 16khz noise output on VIN

    That breakout board was just for testing the MP2145, it's better than nothing... I'll add that in the next PCB version.
    Right now the only way to solve this problem is to replace the components with...
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    Closed: Re: Step Down 16khz noise output on VIN

    Sorry I was a bit too quick, I did not apply the load correctly - the noise is still there and also on the TI EVBs.

    Originally I used 2 TI parts TI54528 (5V to 1.1V) and TPS54335 (12V to 5V).

    I...
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    Closed: Re: Step Down 16khz noise output on VIN

    ok the parts arrived, the EVN did not produce any noise (initially).

    After replacing the inductor on the TI EVN with the inductor recommended in the 3rd party design (DR73-1R5-R) the EVN also...
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    Closed: Re: Step Down 16khz noise output on VIN

    I'll update this discussion once the parts arrive, everything else is speculation at the moment.
    Once the TI EVB arrives I can also swap in the current parts to check if they are okay.
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    Closed: Re: Step Down 16khz noise output on VIN

    Sorry I mean SW pin yes.

    I don't think there's a problem on the layout since I have tried several variations.

    It should be a problem of:
    a) possibly wrong components (inductor, different...
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    Closed: Re: Step Down 16khz noise output on VIN

    There's not much of a "design" left anymore.
    I have loosely soldered the inductor directly on the SS pin and cut the traces from the PCB; there's still some noise there.

    The initial design I have...
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    Closed: Re: Step Down 16khz noise output on VIN

    attached a picture of the voltage at the SW output pin

    157272

    according to this one:

    http://www.ti.com/lit/ds/slvsay4c/slvsay4c.pdf

    it doesn't look right...
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    Closed: Re: Step Down 16khz noise output on VIN

    thanks for the hints, I will go through it within the next days (christmas/family time...)

    I'm using the DR73-1R5-R inductor 1.5uH 6.52A 0.013ohms.

    Should I cut the power trace and add a shunt...
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    Closed: Step Down 16khz noise output on VIN

    Hi,

    I'm using a TPS54528 voltage regulator to get an 1.05V output, the input is 5V.
    However once I apply some load (eg. 1.5 Ampere) I get a 16khz spike on VIN (the closer I go to the chip pin the...
  10. Closed: Recommendation FPGA + Camera Sensor for capturing still image (2019)

    Hi, can anyone recommend an EVN or stacked FPGA system for capturing a still image? preferred 720p.

    I would like to trigger a snapshot - freeze the video and transfer the image via USB to a PC...
  11. Closed: Laser module for detecting SMD component dimensions

    Hi,

    I saw that Cyberoptics is (or was) selling sensors for measuring SMD Component Dimensions. Does anyone know how to control such used modules? Or does anyone know an alternative how to measure...
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    Closed: Re: Need USB3 FTDI or cypress HDL code

    Cypress has sample HDL code online.

    https://community.cypress.com/thread/14764?start=0&tstart=0

    I guess there are plenty HDL examples for the FTDI part on github too.

    All of them have one...
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    Closed: Re: Good PCB Layout Designers

    it really depends on a few items, what are you trying to do?
    It depends on the chipsets, frequency (not particular on the frequency itself but also on the rise time). An edgy looking signal has a...
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    Closed: Re: Good PCB Layout Designers

    I'm in Taiwan nowadays, I never had any issue with EMC (maybe luck, or I have just studied too many competitive products well enough before I did my pcbs)?
    Although I went to a lab several times...
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    Closed: Re: Good PCB Layout Designers

    I would say just do a PCB with all the positive and negative side effects. Usually the first PCBs are based on a reference design anyway there's little someone can do wrong.

    Learning by failing. I...
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    Closed: Re: Negative Slack / Report Analysis

    my final solution was to decrease the memory. I'm sure it could be done with all the memory onboard but interconnecting blocks from different banks introduces very hard to meet delays. Routing delays...
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    Closed: Re: Negative Slack / Report Analysis

    first of all I'm using Lattice Radiant

    everything works as it is basically, the main question is just about the floorplanning and if I'm supposed to be able to influence the floorplanning.

    for...
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    Closed: Re: Negative Slack / Report Analysis

    I'm doing some more experiments with floor planning at the moment but the results are pretty bad.

    Is there any common way which is supposed to work to put an entity/architecture instance into a...
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    Closed: Re: Negative Slack / Report Analysis

    Thanks for all the hints.
    Finally it seems like the fifo is okay :-)
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    Closed: Re: Negative Slack / Report Analysis

    ... for me it is unfortunately.



    the fifo is 16 bit wide, ok I have limited it to 65536bit (done slack went down to 4ns)

    After removing some single-port-ram logic it went down to -1.745ns...
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    Closed: Re: Negative Slack / Report Analysis

    I'm just doing some generic cleanup first, replacing all the variables with signals which at the moment is 90% done.

    I think I got something wrong with the fifo before, it's 30x4k. the total of it...
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    Closed: Re: Negative Slack / Report Analysis

    I'm talented in getting things wrong... ok I have implemented this one (without pipelining it - the fifo is at 5.172ns slack now, comparing with initially 66ns that's a hugh improvement).
    The...
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    Closed: Re: Negative Slack / Report Analysis

    I have so much time in between every fifo commit so even the gray code is not really used.

    Since the buffer is not a power of 2 as mentioned regular graycode doesn't work.

    when having 7680...
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    Closed: Re: Negative Slack / Report Analysis

    Thanks for all the valuable feedback!

    the problem seems to be the fifo size calculation, the fifo is not a power of 2 it's 61440 bit that's why I'm doing the weird calculation (as I would do it in...
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    Closed: Re: Negative Slack / Report Analysis

    I have added a false_path to the reset network.
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