Type: Posts; User: ads-ee

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  1. Closed: Re: Configuring ICE40 FPGA directly from ESP32 uC rather than using dedicated flash I

    You should read the documentation. The FPGA is not the master when programming in SPI from a uC. The uC is the SPI master and programs the FPGA.

    I doubt there is any way to access the SPI...
  2. Closed: Re: Get some advice and tips to design ETHERNET switch or even TSN switch on FPGA

    The TEMAC IP isn't an Ethernet switch.

    An Ethernet switch isn't a topic that is widely discussed on the internet with videos and tutorials as you seem to desire. The companies that make switches...
  3. Replies

    Closed: Re: Modelsim Microsemi Pro 2019.2

    Modelsim has a large buffer for simulation file output, I've observed the file needs 10's of KB before it will automatically write out the buffer.

    vhdl 2008 has a flush(file); procedure
  4. Closed: Re: FPGA Re-Verification after minimal initial verification with Microsemi IGLOO2

    Microsemi tools are not very good at giving consistent results from run to run. Synplify has a habit of making a minor (1 line) change affect multiple unrelated blocks during synthesis. This behavior...
  5. Closed: Re: Is there a way to sort threads by thread starting time?

    I didn't add a keyword, I just set a time frame for posts and it brought up all the recent thread in the last week (which is what I set) in the order they were submitted.
  6. Closed: Re: Is there a way to sort threads by thread starting time?

    Search (on top bar)
    Search Single Content Type
    Sort Results by: Thread Start Date

    Tried it and it appear to do what you want.
  7. Closed: Re: question regarding timing analysis or slack time

    The diagram is worthless, can hardly read it. Besides the only clock I see in the picture is to a single FF for some reset sync block, this shows us nothing about how the clock is used in other parts...
  8. Replies

    Closed: Re: Pipeline: For Loop comparing Module (VHDL)

    These statements seem to contradict each other.
  9. Closed: Re: AVR Soft-Core (ATMega103) - issues during synthesis and implementation

    The pin describe for use by jtag is not a clock capable pin. Depending on the pin location and the global buffer used this can result in a significant clock insertion delay. The timing reports will...
  10. Replies

    Closed: Re: Solve Equations Verilog

    I wonder if the OP wants to create an iterative algorithm to compute the real roots of a polynomial, i.e. enter the polynomial and the design computes the root(s).

    One of the issues they seem to...
  11. Replies

    Closed: Re: fastest multiplication alghorithms

    ...and every stage of that shift and add can be pipelined to run at very high clock frequencies. Depending on how much pipelining is done you will have increased latency for the first output but you...
  12. Replies

    Closed: Re: Verilator width warnings

    Modelsim errors on your code due to issues with using a variable before it's declared.

    Move the assignment to buf_address below the declarations for idx_n, idx_r, and idx_k. A compliant Verilog...
  13. Replies

    Closed: Re: Verilator width warnings

    Verilator doesn't seem to adhere to the Verilog's rules on padding that most Verilog simulators do. You will have to perform all the padding with 0's that are required to ensure the bit widths are...
  14. Replies

    Closed: Re: Assigning a null array in VHDL

    You can't use the mobile site if you want to see any attachments. The forum on the mobile site is text based only.

    Use the full site.
  15. Replies

    Closed: Re: Using a BFM in system verification code.

    It seems to me your problem has to do with not understanding SV interfaces. Maybe reading a tutorial on interfaces will help.
  16. Closed: Re: 12v DC proximity detector for use on truck (2-3 feet range)

    That's what I gather from the OP's first post.

    Besides I work in a location with a crappy parking lot design that has a choke point in the lot that has straight in parking on both sides where if...
  17. Replies

    Closed: Re: readback the firmware Cyclone IV

    Like I mentioned I haven't used Quartus tools in decades, so I wasn't sure that there was a way to read a EPCS in system with the only connection to the EPCS being the FPGA. I was mistaken in...
  18. Closed: Re: 12v DC proximity detector for use on truck (2-3 feet range)


    1) ultrasonic sensor
    2) Arduino + sw
    3) camera

    Sensor catches something getting close to your vehicle, Arduino SW detects this condition and triggers the camera to record, when they...
  19. Closed: Re: 12v DC proximity detector for use on truck (2-3 feet range)

    Ask google/audi/mercedes/bmw/toyota/etc for help. They've spent billions on trying to determine if an object is a ball, cat, dog, human, car, truck, etc. I might be wrong but there is probably no way...
  20. Replies

    Closed: Re: readback the firmware Cyclone IV

    I'm not sure you can use the Intel tools to read the entire EPCS data from device to reprogram another EPCS device or the same device. It's been a long time since I used Altera/Intel but I'm pretty...
  21. Replies

    Closed: Re: readback the firmware Cyclone IV

    How is reprogramming the Cyclone IV FPGA going to fix the board? The Cyclone IV is SRAM based and loses it's configuration when powered off. If the FPGA was damaged then just replace the FPGA. Unless...
  22. Replies

    Closed: Re: Data Transfer over long rwisted pair cable

    Metanoia? I don't think that software solutions company actually makes products.

    Do you mean Motorola, which is now part of Arris?

    You won't find much information on the inner working of any of...
  23. Replies

    Closed: Re: Small Project to solve Big Problem

    Seems to me it would be a lot easier (cheaper/less hassle) to just count (either in your head or out loud). And train yourself to never release until the count expires.

    I have no idea how...
  24. [SOLVED]Closed: Re: Generating Sine Wave Through External DAC (STM32)

    Either what every you do outside the for loop takes too much time or starting up a new for loop takes a lot of time.

    I'm not a SW engineer so I don't know how long it takes SW to set up a new for...
  25. [SOLVED]Closed: Re: Generating Sine Wave Through External DAC (STM32)

    The equation is the problem.
    sin( I * 6.28/360)

    Try plotting it in excel or something.

    sine has a full cycle from 0 to 2pi. You are indexing from 0-511 and end up going from 0 to 511/360*2pi...
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