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  1. Replies
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    Closed: Re: Ohm's Law and Power calculation problem

    You can also model what you are doing with SPICE.
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    Closed: Re: Ohm's Law and Power calculation problem

    What is the essnce of C1?
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    Closed: Re: Ohm's Law and Power calculation problem

    Sorry, I missed that.

    If I may ask, why are you measuring voltage at that node? If you want to filter, I think you should divide before you filter rather than have those caps connected like that....
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    Closed: Re: Ohm's Law and Power calculation problem

    In addition to what klaus has said, P is not UUR. P is UU/R.
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    Closed: Re: current-mode boost converter UC3845

    The noise you're hearing is inductor saturation.

    - - - Updated - - -

    Your major issue seems to be your duty cycle. Your duty cycle may be saturating. uc3845 has maximum of 46% or thereabout...
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    Closed: Re: SMPS power stage bode plot

    Hi mtwieg,

    We were discussing only the dc gain of the control-to-output transfer function for buck converters. We did not need to include poles and zeroes and, additionally, there is no RHPZ for...
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    Closed: Re: SMPS power stage bode plot

    For forward converter, you have the same expression as for the buck converter except that Vin will now be n*Vin and Rsense will now be n*Rsense with n = Ns/Np.
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    Closed: Re: SMPS power stage bode plot

    No treez,

    It can be seen from the control-to-output transfer function. Even the dc gain result you get after computing Rload/Rsense with modulator gain in the simple model would more likely be...
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    Closed: Re: SMPS power stage bode plot

    Hi treez,

    Something just brought me to this thread and I just realized that you were asking for the low-frequency gain expression for the control-to-output transfer function of a current mode buck...
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    Closed: Re: Buck converter vs buck-boost converter

    Hi,

    No single topology is generally more efficient than the others. Your selection should be based on your particular application. Switch utilization is what is used to determine which topology is...
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    Closed: Re: average value of as square wave

    Hi,

    This is done all the time with power converters where the switch voltage is averaged out by the low-pass filter (output filter). You just need a low-pass filter that is 'good enough' to bring...
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    Closed: Re: ac consumption in a adapter

    So, just like Klaus has mentioned, you will lose some power during the AC_DC conversion. You need more than 24W at the AC_DC adapter input. The maximum power that you need at adapter input would now...
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    Closed: Re: ac consumption in a adapter

    Hi,

    That is the maxum power that your load consumes. At low load, it would consume less anyways.

    Your adapter has an efficiency curve against load demand. Your adapter efficiency is highest at...
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    Closed: Re: SMPS power stage bode plot

    Of course I know that you are discussing the small signal transfer function and that expression that I wrote in post #8 is the low frequency gain of the control-to-output transfer function of an...
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    Closed: Re: SMPS power stage bode plot

    Hi,

    The low frequency gain of a CCM buck is approx Vout/Duty. For DCM, it's a little bit more complicated.
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    Closed: Re: SMPS power stage bode plot

    Yes. However, the PWM actually reduces the gain of the power stage response. It's just a gain function, no poles and no zeroes.
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    Closed: Re: SMPS power stage bode plot

    Hi, the modulator is not part of the power stage. You include the modulator gain when you are analyzing the loop gain - i.e. the uncompensated loop gain - just before you close the loop.
  18. [SOLVED]Closed: Re: hello can somebody help me what to do with generated quartus file .sdo .vho

    How do you mean "to select the correct pin"? At the minimum, you very much need the device datasheet.

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    Also in the pin planner, mere placing the cursor on a pin would display...
  19. [SOLVED]Closed: Re: hello can somebody help me what to do with generated quartus file .sdo .vho

    There is a free online course on the Intel website on how to meet timing using the TimeQuest Timing Analyzer. Go through the course with a bit of practice. Obviously the issue is on the setup time or...
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    Closed: Re: Multiplexer output width depends on SELECT

    So all the operations are parallel and may even take one clock cycle to append the extra data.

    If any part of my post is not clear, feel free to ask for an explanation.
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    Closed: Re: Multiplexer output width depends on SELECT

    Very well then, consider this.
    Feed each data line into one input of a two input mux. The second input of each mux on a data line that does not bear a data bit at the time would be fed an 'append...
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    Closed: Re: Multiplexer output width depends on SELECT

    Okay, so it's just parallel data comong in and not necessarily a bus.

    Doing this operation using a mux and then a demux to me is time consuming. I believe the operation can be accomplished with...
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    Closed: Re: Multiplexer output width depends on SELECT

    So the data coming in on the bus has bits that are either '1', '0' or 'Z'?

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    I'm much concerned about 'Z'.
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    Closed: Re: Multiplexer output width depends on SELECT

    A mux has a single bit output. You can synchronize the output with clock though.

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    If you just have a mux and then a demux, and you have a common select signal to the select...
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    Closed: Re: Gate Level Simulation

    Hi,

    Gate level simulation of what netlist? Where? With what?

    You need to give details.
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