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Type: Posts; User: sandy2811

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  1. Closed: Re: Adding Shift Register in scan chain without converting to scan cell

    Is that any particular command in DFTAdvisor tool for doing the same as DC.
  2. Closed: Re: Adding Shift Register in scan chain without converting to scan cell

    I am doing scan insertition on DFTAdvisor tool. So in this tool how it is possible.

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    Hi oratie,
    As you said, DC will automatically identify existing shift registers and...
  3. Closed: Adding Shift Register in scan chain without converting to scan cell

    Hi all,

    Is it good to convert shift register as scan cell in netlist or not ? But how to add shiftt register in scan chain without converting it to scan cell/flops.
    I have 4 bit shift reg in my...
  4. Closed: Re: Problem to understand internal architecture of JTAG

    Thanks a lot ads-ee......
  5. Closed: Re: Problem to understand internal architecture of JTAG

    I have read the spec, and I am not getting it correctly that in case of if I am passing an instruction then any data register is accessible according to that instruction but how the values are...
  6. Closed: Re: Problem to understand internal architecture of JTAG

    JTAG is defined as a serial communication protocol and a state machine accessible via a TAP. But how the data is captured in capture_IR or capture_DR state it is the main issue and the data is...
  7. Closed: Problem to understand internal architecture of JTAG

    What is the reason of getting output TDO on negative edge in JTAG ???
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    Closed: Re: Counter Preload by any given values

    Thanks but i have design this for synchronous reset.....
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    Closed: Shift register will parallel load

    How can design shift register with parallel load...................
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    Closed: Re: Counter Preload by any given values

    Nothing problem in this code but my idea is to make a counter which is start by a given or known value( i assume 5).
    and i want to start counter by this (5) initial value by using preset or clear...
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    Closed: Re: Counter Preload by any given values

    My code is this


    module preload_counter(q,
    clk,
    rst,
    en,
    load,
    preload,
    ...
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    Closed: Re: Counter Preload by any given values

    I have already done this things as you have told, but i want to reset it by using preset or clear logic but i am not getting it perfectly...............
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    Closed: Counter Preload by any given values

    Hello,
    How can preload the counter by known value......counter is either synchronous or asynchronous.
    if i want to start my counter from 5 then which type of coding is required in verilog....
  14. Closed: How to design self checking testbench...

    How can design self checking testbench for simple 2 input logic gates .....
  15. Closed: how to use system task in testbench for making self checking testbench.

    What are the exact differences among $display, $strobe and $monitor with respect to timing simulation. Please verify by any example.....
  16. Closed: Atmega32 Portc Problem with interfacing LCD,led or other peripherals....

    I am working with atmega32 and facing a problem of portc pins are not working.0,1 and 6,7 bit are working but 1234 are not.
    So how can it work?
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    Closed: Re: calmagraphics

    Gdsii :- graphical design system for information interchange

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    Please tell me what is OASIS
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